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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
12005665
Filing Dt:
12/27/2007
Publication #:
Pub Dt:
08/28/2008
Inventor:
Byung-Wook Nam
Title:
Method for manufacturing high flatness silicon wafer
Assignment: 1
Reel/Frame:
020751/0870Recorded: 03/28/2008Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
02/28/2008
Assignee:
274 IMSOO-DONG, GUMI-CITY
GYEONGSANGBUK-DO 730-724, KOREA, REPUBLIC OF
Correspondent:
B. JOE KIM
GREER, BURNS & CRAIN, LTD.
300 S. WACKER DRIVE
SUITE 2500
CHICAGO, IL 60606

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