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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
11847053
Filing Dt:
08/29/2007
Publication #:
Pub Dt:
03/05/2009
Inventors:
Angelo Pinto, Periannan R. Chidambaram, Rick L. Wise
Title:
METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE IN THE FABRICATION OF NANO-SCALE CMOS TRANSISTORS USING DSB SUBSTRATE AND HOT TECHNOLOGY
Assignment: 1
Reel/Frame:
019794/0407Recorded: 09/04/2007Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
08/20/2007
Exec Dt:
08/07/2007
Exec Dt:
07/19/2007
Assignee:
7839 CHURCHILL WAY, M/S 3999
DALLAS, TEXAS 75251
Correspondent:
PETER MCLARTY, ESQ.
TEXAS INSTRUMENTS INCORPORATED
7839 CHURCHILL WAY
M/S 3999
DALLAS, TX 75251

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