Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12255697
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Filing Dt:
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10/22/2008
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Publication #:
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Pub Dt:
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04/30/2009
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Inventors:
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Osamu Kawagoe, Akira Sato
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Title:
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Logic Gate and Semiconductor Integrated Circuit Device Using the Logic Gate
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-11-2, TSURUMAKI, TAMA-SHI |
| TOKYO, JAPAN 206-8567 |
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| IPUSA, P.L.L.C |
| 1054 31ST STREET, N.W. |
| SUITE 400 |
| WASHINGTON, DC 20007 |
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