Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12040777
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Filing Dt:
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02/29/2008
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Publication #:
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Pub Dt:
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09/03/2009
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Inventors:
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Jae Gon Lee, Elgin Kiok Boone Quek, Young Way Teh, Wenzhi Gao
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Title:
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INTEGRATED CIRCUIT SYSTEM FOR SUPPRESSING SHORT CHANNEL EFFECTS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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60 WOODLANDS INDUSTRIAL PARK D |
STREET 2 |
SINGAPORE 738406, SINGAPORE |
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MIKIO ISHIMARU |
LAW OFFICES OF MIKIO ISHIMARU |
333 W. EL CAMINO REAL, SUITE # 330 |
SUNNYVALE, CA 94087 |
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