Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12118560
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Filing Dt:
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05/09/2008
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Publication #:
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Pub Dt:
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11/12/2009
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Inventors:
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Jan Gutsche, Michael Scheppler, Detlev Richter, Doris Keitel Schulz, Helmut Schwalm
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Title:
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Memory Cell Arrangement and Method for Reading State Information From a Memory Cell Bypassing an Error Detection Circuit
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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KOENIGSBRUECKER STR. 180 |
DRESDEN, GERMANY 01099 |
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SLATER & MATSIL, L.L.P. |
17950 PRESTON ROAD |
SUITE 1000 |
DALLAS, TX 75252 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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GUSTAV-HEINEMANN-RING 212 |
MUENCHEN, GERMANY 81739 |
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BARRY E. BRETSCHNEIDER |
C/O MORRISON & FOERSTER LLP |
1650 TYSONS BLVD STE 400 |
MCLEAN, VA 22102 |
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