Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/31/2012
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Application #:
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12701090
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Filing Dt:
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02/05/2010
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Publication #:
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Pub Dt:
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07/08/2010
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Inventors:
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Boris Lerner, Douglas Garde
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Title:
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PROCESSOR ARCHITECTURES FOR ENHANCED COMPUTATIONAL CAPABILITY AND LOW LATENCY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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ONE TECHNOLOGY WAY |
P.O. BOX 9106 |
NORWOOD, MASSACHUSETTS 02062-9106 |
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GOODWIN PROCTER LLP |
PATENT ADMINISTRATOR |
EXCHANGE PLACE |
BOSTON, MA 02109 |
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