Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13024715
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Filing Dt:
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02/10/2011
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Publication #:
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Pub Dt:
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08/25/2011
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Inventors:
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Haruo NAKAZAWA, Motoyoshi Kubouchi, Hideo Shimizu, Hideaki Teranishi
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Title:
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REVERSE BLOCK-TYPE INSULATED GATE BIPOLAR TRANSISTOR MANUFACTURING METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-1 TANABESHINDEN, KAWASAKI-KU |
KAWASAKI-SHI, 210-0856, JAPAN |
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STAAS & HALSEY LLP |
ATTENTION: DAVID M PITCHER |
1201 NEW YORK AVE, N W, 7TH FLOOR |
WASHINGTON, D.C 20005 |
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Assignment:
2
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MERGER AND CHANGE OF NAME
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1-1, TANABESHINDEN, KAWASAKI-KU, |
KAWASAKI-SHI, JAPAN |
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ROSSI, KIMMS & MCDOWELL |
20609 GORDON PARK SQUARE, SUTIE 150 |
ASHBURN, VA 20147 |
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