Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12756965
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Filing Dt:
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04/08/2010
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Publication #:
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Pub Dt:
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10/13/2011
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Inventor:
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Siamak Arya
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Title:
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Method Of Operating A NAND Memory Controller To Minimize Read Latency Time
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1171 SONORA COURT |
| SUNNYVALE, CALIFORNIA 94086 |
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| ALAN A. LIMBACH |
| DLA PIPER LLP US |
| 2000 UNIVERSITY AVENUE |
| EAST PALO ALTO, CA 94303 |
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Assignment:
2
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NUNC PRO TUNC ASSIGNMENT (SEE DOCUMENT FOR DETAILS).
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| 2000 UNIVERSITY AVENUE |
| EAST PALO ALTO, CALIFORNIA 94303 |
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| RONALD L. YIN |
| DLA PIPER LLP US |
| 2000 UNIVERSITY AVENUE |
| EAST PALO ALTO, CA 94303 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3970 FREEDOM CIRCLE |
| SUITE 100 |
| SANTA CLARA, CALIFORNIA 95054 |
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| RONALD L. YIN |
| DLA PIPER LLP US |
| 2000 UNIVERSITY AVENUE |
| EAST PALO ALTO, CA 94303 |
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