Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/07/2015
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Application #:
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13245183
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Filing Dt:
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09/26/2011
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Publication #:
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Pub Dt:
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07/26/2012
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Inventors:
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Jonathan (Son) Hung Tran, Raguram Damodaran, Abhijeet Ashok Chachad et al
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Title:
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PERFORMANCE AND POWER IMPROVEMENT ON DMA WRITES TO LEVEL TWO COMBINED CACHE/SRAM THAT IS CAUSED IN LEVEL ONE DATA CACHE AND LINE IS VALID AND DIRTY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 12500 TI BOULEVARD |
| MS 3999 |
| DALLAS, TEXAS 75243 |
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| TEXAS INSTRUMENTS INCORPORATED |
| P O BOX 655474 |
| MS 3999 |
| DALLAS, TX 75265 |
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