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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
04/15/2014
Application #:
13436980
Filing Dt:
04/01/2012
Publication #:
Pub Dt:
10/03/2013
Inventors:
Chien-An Yu, Yi-Fong Lin
Title:
MEMORY ARRAY WITH HIERARCHICAL BIT LINE STRUCTURE
Assignment: 1
Reel/Frame:
027968/0638Recorded: 04/01/2012Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
02/20/2012
Exec Dt:
02/20/2012
Assignee:
HWA-YA TECHNOLOGY PARK 669, FUHSING 3 RD., KUEISHAN
TAO-YUAN HSIEN, TAIWAN
Correspondent:
WINSTON HSU
P.O.BOX 506
MERRIFIELD, VA 22116

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