Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/09/2014
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Application #:
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14068066
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Filing Dt:
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10/31/2013
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Publication #:
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Pub Dt:
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02/27/2014
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Inventor:
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MASAKUNI KAWAGOE
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Title:
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INTEGRATED CIRCUIT HAVING LATCH CIRCUITS AND USING DELAY CIRCUITS TO FETCH DATA BITS IN SYNCHRONIZATION WITH CLOCK SIGNALS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-4-8 SHIN-YOKOHAMA, KOHOKU-KU |
| YOKOHAMA, JAPAN 222-8575 |
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| VOLENTINE & WHITT, PLLC |
| 11951 FREEDOM DRIVE, 13TH FLOOR |
| RESTON, VA 20190 |
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