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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
14498516
Filing Dt:
09/26/2014
Publication #:
Pub Dt:
03/31/2016
Inventors:
Vasudev Bibikar, Verma R. Rohit, Irwin J. Vaz, Suketu R. Partiwala, Stefan Macher et al
Title:
POWER MANAGEMENT FOR MEMORY ACCESSES IN A SYSTEM-ON-CHIP
Assignment: 1
Reel/Frame:
036720/0027Recorded: 10/02/2015Pages: 16
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/30/2014
Exec Dt:
09/26/2014
Exec Dt:
09/29/2014
Exec Dt:
08/01/2015
Exec Dt:
05/09/2015
Exec Dt:
02/28/2015
Exec Dt:
03/03/2015
Assignee:
2200 MISSION COLLEGE BOULEVARD
SANTA CLARA, CALIFORNIA 95054
Correspondent:
DERMOT G. MILLER
1279 OAKMEAD PARKWAY
SUNNYVALE, CA 94085

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