Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14607352
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Filing Dt:
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01/28/2015
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Publication #:
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Pub Dt:
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07/28/2016
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Inventors:
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Jason Zse-Cherng Lin, Shauh-Teh Juang
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Title:
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Methodology Of Incorporating Wafer Physical Measurement With Digital Simulation For Improving Semiconductor Device Fabrication
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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5F-1, NO. 100, SEC. 1, JIAFENG 11TH RD. |
ZHUBEI CITY |
HSINCHU COUNTY, TAIWAN |
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JASON Z. LIN |
PO BOX 2339 |
SARATOGA, CA 95070-0339 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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3050 BOWERS AVENUE |
SANTA CLARA, CALIFORNIA 95054 |
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PATTERSON + SHERIDAN LLP |
24 GREENWAY PLAZA |
SUITE 1600 |
HOUSTON, TX 77046 |
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