Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/03/2017
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Application #:
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14970710
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Filing Dt:
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12/16/2015
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Publication #:
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Pub Dt:
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08/11/2016
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Inventors:
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Doo-Young Lee, Dohyoung KIM, Johnsoo KIM, Heungsik PARK, Hongsik SHIN, Younghun CHOI
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Title:
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METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING GATE PATTERNS WITH SIDEWALL SPACERS AND CAPPING PATTERNS ON THE SIDEWALL SPACERS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 129, SAMSUNG-RO, YEONGTONG-GU |
| GYEONGGI-DO |
| SUWON-SI, KOREA, REPUBLIC OF 443-742 |
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| MYERS BIGEL SIBLEY & SAJOVEC, P.A. |
| 4140 PARKLAKE AVENUE |
| SUITE 600 |
| RALEIGH, NC 27612 |
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