Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/04/2018
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Application #:
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15718449
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Filing Dt:
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09/28/2017
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Publication #:
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Pub Dt:
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01/18/2018
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Inventors:
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Mattheus Cornelis Antonius Adrianus Heddes, Natarajan Vaidhyanathan et al
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Title:
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PROVIDING MEMORY BANDWIDTH COMPRESSION USING MULTIPLE LAST-LEVEL CACHE (LLC) LINES IN A CENTRAL PROCESSING UNIT (CPU)-BASED SYSTEM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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5775 MOREHOUSE DRIVE |
SAN DIEGO, CALIFORNIA 92121 |
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W&T/QUALCOMM |
106 PINEDALE SPRINGS WAY |
CARY, NC 27511 |
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