Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/07/2020
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Application #:
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15541434
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Filing Dt:
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07/03/2017
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Publication #:
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Pub Dt:
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01/25/2018
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Inventors:
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Bin LUO, Hua WANG, Shouyin YE, Xuefei TANG, Jianbo LING, Jianming YE
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Title:
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CONFIGURATION AND TESTING METHOD AND SYSTEM FOR FPGA CHIP USING BUMPING PROCESS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2ND FLOOR, BUILDING 2, NO.351 GUOSHOUJING ROAD |
PUDONG NEW AREA, SHANGHAI, CHINA 201203 |
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MAIER & MAIER, PLLC |
345 SOUTH PATRICK STREET |
ALEXANDRIA, VA 22314 |
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09/22/2024 07:41 PM
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