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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
10/30/2018
Application #:
15898659
Filing Dt:
02/18/2018
Publication #:
Pub Dt:
06/21/2018
Inventors:
Michael J. Miller, Jay B. Patel, Michael J. Morrison
Title:
Integrated Main Memory And Coprocessor With Low Latency
Assignment: 1
Reel/Frame:
046772/0107Recorded: 09/02/2018Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/09/2015
Exec Dt:
01/09/2015
Exec Dt:
01/09/2015
Assignee:
2309 BERING DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondent:
MOSYS, INC.
2309 BERING DRIVE
LEGAL DEPT.
SAN JOSE, CA 95131

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