Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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01/14/2020
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Application #:
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15534921
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Filing Dt:
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06/09/2017
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Publication #:
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Pub Dt:
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09/20/2018
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Inventors:
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Thomas QUAGLIO, Mathieu MILLEQUANT, Charles TIPHINE
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Title:
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METHOD OF APPLYING VERTEX BASED CORRECTIONS TO A SEMICONDUCTOR DESIGN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7, PARVIS LOUIS NEEL |
| MINATEC BAT. 52 DE HAUTE TECHNOLOGIE |
| GRENOBLE, FRANCE 38000 |
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| BAKER & HOSTETLER LLP |
| WASHINGTON SQUARE, SUITE 1100 |
| 1050 CONNECTICUT AVENUE, N.W. |
| WASHINGTON, DC 20036 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3050 BOWERS AVENUE |
| SANTA CLARA, CALIFORNIA 95054 |
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| PATTERSON + SHERIDAN, LLP |
| 24 GREENWAY PLAZA |
| SUITE 1600 |
| HOUSTON, TX 77046 |
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