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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
12/10/2019
Application #:
15860912
Filing Dt:
01/03/2018
Publication #:
Pub Dt:
03/28/2019
Inventors:
Ming-Shiang LIN, Chun-Chieh LU, Carlos H. DIAZ, Chia-Cheng HO, Cheng-Yi PENG et al
Title:
Method of Manufacturing a Semiconductor Device Having a Gate with Ferroelectric Layer
Assignment: 1
Reel/Frame:
044522/0987Recorded: 01/03/2018Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/21/2017
Exec Dt:
12/22/2017
Exec Dt:
12/21/2017
Exec Dt:
12/21/2017
Exec Dt:
12/21/2017
Exec Dt:
12/21/2017
Assignee:
NO. 8, LI-HSIN RD. 6
SCIENCE-BASED INDUSTRIAL PARK
HSINCHU, TAIWAN 300
Correspondent:
MCCLURE, QUALEY & RODACK, LLP
3100 INTERSTATE NORTH CIRCLE
SUITE 150
ATLANTA, GA 30339

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