Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/03/2021
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Application #:
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16273334
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Filing Dt:
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02/12/2019
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Publication #:
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Pub Dt:
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08/15/2019
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Inventors:
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Chih-Hsiang HO, Yuval BEN-DOV, Yi LU, Teck Ping SIM
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Title:
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VIA PLACEMENT FOR SLIM BORDER ELECTRO-OPTIC DISPLAY BACKPLANES WITH DECREASED CAPACITIVE COUPLING BETWEEN T-WIRES AND PIXEL ELECTRODES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1000 TECHNOLOGY PARK DRIVE |
| BILLERICA, MASSACHUSETTS 01821-4165 |
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| E INK CORPORATION |
| 1000 TECHNOLOGY PARK DRIVE |
| ATTN: IP DEPARTMENT |
| BILLERICA, MA 01821-4165 |
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