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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
06/23/2020
Application #:
16545345
Filing Dt:
08/20/2019
Publication #:
Pub Dt:
03/05/2020
Inventor:
Cheng C. Wang
Title:
Multiplier-Accumulator Circuit, Logic Tile Architecture for Multiply-Accumulate, and IC including Logic Tile Array
Assignment: 1
Reel/Frame:
050849/0034Recorded: 10/30/2019Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
10/29/2019
Assignee:
2465 LATHAM STREET, SUITE 100
MOUNTAIN VIEW, CALIFORNIA 94040
Correspondent:
NEIL A. STEINBERG
5335 WISCONSIN AVE., NW SUITE 440
WASHINGTON, D.C. 20015

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