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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
01/11/2022
Application #:
16718339
Filing Dt:
12/18/2019
Publication #:
Pub Dt:
01/14/2021
Inventors:
Mark I. Gardner, H. Jim Fulford
Title:
MULTIPLE PLANES OF TRANSISTORS WITH DIFFERENT TRANSISTOR ARCHITECTURES TO ENHANCE 3D LOGIC AND MEMORY CIRCUITS
Assignment: 1
Reel/Frame:
051315/0035Recorded: 12/18/2019Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/06/2019
Exec Dt:
12/16/2019
Assignee:
AKASAKA BIZ TOWER, 3-1 AKASAKA 5-CHOME, MINATO-KU
TOKYO, JAPAN 107-6325
Correspondent:
OBLON, ET AL.
1940 DUKE STREET
ALEXANDRIA, VA 22314

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