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Patent Assignment Abstract of Title

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Total Assignments: 2

Patent #:	11756832	Issue Dt:	09/12/2023	Application #:	16733959	Filing Dt:	01/03/2020
Publication #:	20210098303	Pub Dt:	04/01/2021
Inventors:	Chia-Wei Hsu, Xiong-Fei Yu, Pei Ying Lai, Cheng-Hao Hou, Chi On Chui
Title:	GATE STRUCTURES IN SEMICONDUCTOR DEVICES

Assignment: 1

Reel/Frame:

051412/0739

Recorded: 01/03/2020

Pages: 4

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

LAI, PEI YING

Exec Dt:

10/18/2019

HSU, CHIA-WEI

Exec Dt:

10/18/2019

HOU, CHENG-HAO

Exec Dt:

10/18/2019

YU, XIONG-FEI

Exec Dt:

12/27/2019

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

8, LI-HSIN RD. 6 HSINCHU SCIENCE PARK

HSINCHU, TAIWAN 300-78

Correspondent:

SLATER MATSIL, LLP/TSMC

17950 PRESTON ROAD, SUITE 1000

DALLAS, TX 75252

Assignment: 2

Reel/Frame:

051534/0594

Recorded: 01/09/2020

Pages: 6

Conveyance:

CORRECTIVE ASSIGNMENT TO CORRECT THE OMISSION OF THE 5TH INVENTOR'S NAME PREVIOUSLY RECORDED AT REEL: 051412 FRAME: 0739. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT .

Assignors:

LAI, PEI YING

Exec Dt:

10/18/2019