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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
03/14/2023
Application #:
17457440
Filing Dt:
12/03/2021
Publication #:
Pub Dt:
03/24/2022
Inventors:
Yueer SHAN, Jicong FAN, Yanfeng XU, Zhan JING
Title:
FIELD PROGRAMMABLE GATE ARRAY (FPGA) WITH AUTOMATIC ERROR DETECTION AND CORRECTION FUNCTION FOR PROGRAMMABLE LOGIC MODULES
Assignment: 1
Reel/Frame:
058276/0461Recorded: 12/03/2021Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
11/23/2021
Exec Dt:
11/23/2021
Exec Dt:
11/23/2021
Exec Dt:
11/23/2021
Assignee:
FLOOR 2, BUILDING B1, NO. 777, WEST JIANZHU ROAD, LIYUAN STREET,BINHU DISTRICT WUXI, JIANGSU 214000
WUXI, CHINA
Correspondent:
GOKALP BAYRAMOGLU
1540 W. WARM SPRINGS ROAD SUITE 100
HENDERSON, NV 89014

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