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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
17428216
Filing Dt:
08/03/2021
Publication #:
20220122215
Pub Dt:
04/21/2022
Inventors:
SELVAKUMAR PANNEER, BEN ASHBAUGH, ABHISHEK APPU, RAVISHANKAR IYER, PATTABHIRAMAN K et al
Title:
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
Assignment: 1
Reel/Frame:
057257/0506Recorded: 08/23/2021Pages: 19
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
RAY, JOYDEEP
Exec Dt:
06/19/2020
PANNEER, SELVAKUMAR
Exec Dt:
09/10/2020
TANGRI, SAURABH
Exec Dt:
04/22/2021
ASHBAUGH, BEN
Exec Dt:
01/22/2021
JANUS, SCOTT
Exec Dt:
09/02/2020
APPU, ABHISHEK
Exec Dt:
12/03/2020
GEORGE, VARGHESE
Exec Dt:
03/25/2020
IYER, RAVISHANKAR
Exec Dt:
01/21/2021
JAIN, NILESH
Exec Dt:
07/07/2020
K, PATTABHIRAMAN
Exec Dt:
03/30/2020
KOKER, ALTUG
Exec Dt:
02/01/2021
MACPHERSON, MIKE
Exec Dt:
05/27/2020
MASTRONARDE, JOSH
Exec Dt:
06/11/2021
OULD-AHMED-VALL, ELMOUSTAPHA
Exec Dt:
11/06/2020
S, JAYAKRISHNA P.
Exec Dt:
05/05/2021
SAMSON, ERIC
Exec Dt:
04/23/2021
Assignee:
INTEL CORPORATION
2200 MISSION COLLEGE BLVD.
SANTA CLARA, CALIFORNIA 95054
Correspondent:
JAFFERY WATSON MENDONSA & HAMILTON LLP
7501 VILLAGE SQUARE DRIVE, SUITE 206
CASTLE PINES, CO 80108

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