Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/10/2024
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Application #:
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17548096
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Filing Dt:
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12/10/2021
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Publication #:
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Pub Dt:
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06/30/2022
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Inventors:
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Arpit VIJAYVERGIA, Vikas RANA
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Title:
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CIRCUIT AND METHOD FOR ON-CHIP LEAKAGE DETECTION AND COMPENSATION FOR MEMORIES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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CHEMIN DU CHAMP-DES-FILLES 39 |
PLAN-LES-OUATES |
GENEVA, SWITZERLAND 1228 |
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SEED IP LAW GROUP LLP |
701 5TH AVE #5400 |
SEATTLE, WA 98104 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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CHEMIN DU CHAMP-DES-FILLES 39 |
PLAN-LES-OUATES |
GENEVA, SWITZERLAND 1228 |
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TESSA DEJKUNCHORN |
701 FIFTH AVENUE, SUITE 5400 |
SEED IP LAW GROUP LLP |
SEATTLE, WA 98104 |
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09/22/2024 08:18 PM
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