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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
17239328
Filing Dt:
04/23/2021
Publication #:
20220344516
Pub Dt:
10/27/2022
Inventors:
Yan-Ting Lin, Yen-Ru Lee, Chien-Chang Su, Chih-Yun Chin, Chien-Wei Lee, Pang-Yen Tsai et al
Title:
LOW GE ISOLATED EPITAXIAL LAYER GROWTH OVER NANO-SHEET ARCHITECTURE DESIGN FOR RP REDUCTION
Assignment: 1
Reel/Frame:
056842/0484Recorded: 07/13/2021Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
LIN, YAN-TING
Exec Dt:
04/25/2021
CHIN, CHIH-YUN
Exec Dt:
06/28/2021
LEE, CHIEN-WEI
Exec Dt:
05/19/2021
LEE, YEN-RU
Exec Dt:
06/21/2021
LI, CHII-HORNG
Exec Dt:
05/11/2021
SU, CHIEN-CHANG
Exec Dt:
04/26/2021
TSAI, PANG-YEN
Exec Dt:
04/25/2021
YEO, YEE-CHIA
Exec Dt:
05/03/2021
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300-78
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON RD., SUITE 1000
DALLAS, TX 75252

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