Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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17588767
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Filing Dt:
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01/31/2022
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Publication #:
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Pub Dt:
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12/29/2022
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Inventor:
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Robert Wiser
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Title:
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Chip to Chip Interconnect Beyond Sealring Boundary
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2107 N. 1ST ST. |
| SUITE 540 |
| SAN JOSE, CALIFORNIA 95131 |
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| JAY CHESAVAGE |
| 3833 MIDDLEFIELD |
| PALO ALTO, 94303 UNITED STATES |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2107 N. 1ST ST. |
| SUITE 540 |
| SAN JOSE, CALIFORNIA 95131 |
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| JAY A. CHESAVAGE |
| 3833 MIDDLEFIELD RD. |
| PALO ALTO, CA 95131 |
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05/29/2024 08:45 AM
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