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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
01/17/2023
Application #:
17443556
Filing Dt:
07/27/2021
Publication #:
Pub Dt:
02/09/2023
Inventors:
Venkata Narayanan SRINIVASAN, Avneep Kumar GOYAL, Balwinder Singh SONI
Title:
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
Assignment: 1
Reel/Frame:
056991/0283Recorded: 07/27/2021Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
07/26/2021
Exec Dt:
07/27/2021
Exec Dt:
07/27/2021
Assignee:
CHEMIN DU CHAMP-DES-FILLES 39
PLAN-LES-OUATES
GENEVA, SWITZERLAND 1228
Correspondent:
CROWE & DUNLEVY IP SECTION - DALLAS
2525 MCKINNON STREET SUITE 425
DALLAS, TX 75201

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