Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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17412810
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Filing Dt:
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08/26/2021
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Publication #:
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Pub Dt:
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03/02/2023
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Inventors:
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Kaladhar Radhakrishnan, William J. Lambert, Sriram Srinivasan, Krishna Bharath et al
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Title:
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PACKAGING ARCHITECTURE FOR DISAGGREGATED INTEGRATED VOLTAGE REGULATORS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2200 MISSION COLLEGE BOULEVARD |
| SANTA CLARA, CALIFORNIA 95054 |
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| MANJULA VARIYAM |
| PATENT CAPITAL GROUP |
| 30 FLOWER LANE |
| LEVITTOWN, CA 19055 |
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