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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
03/19/2024
Application #:
17446515
Filing Dt:
08/31/2021
Publication #:
Pub Dt:
03/02/2023
Inventors:
Te-Hsin CHIU, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG, Jiun-Wei LU
Title:
INTEGRATED CIRCUIT WITH FRONTSIDE AND BACKSIDE CONDUCTIVE LAYERS AND EXPOSED BACKSIDE SUBSTRATE
Assignment: 1
Reel/Frame:
058225/0377Recorded: 11/29/2021Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
11/18/2021
Exec Dt:
06/09/2021
Exec Dt:
06/10/2021
Exec Dt:
06/14/2021
Exec Dt:
06/09/2021
Assignee:
8, LI-HSIN RD. 6
HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 30078
Correspondent:
MERCHANT & GOULD PC
P.O. BOX 2903
MINNEAPOLIS, MN 55402-0903

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