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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
NONE
Issue Dt:
10/01/2024
Application #:
17564137
Filing Dt:
12/28/2021
Publication #:
Pub Dt:
06/29/2023
Inventors:
Wonjun JUNG, Jasmeet SINGH NARANG, Tyrone HUANG, Christopher KLEMENT, Alan D. SMITH et al
Title:
THROUGH-SILICON VIA LAYOUT FOR MULTI-DIE INTEGRATED CIRCUITS
Assignment: 1
Reel/Frame:
059403/0365Recorded: 03/25/2022Pages: 9
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/18/2022
Exec Dt:
01/26/2022
Exec Dt:
03/01/2022
Exec Dt:
01/20/2022
Assignee:
1 COMMERCE VALLEY DRIVE EAST
MARKHAM, CANADA L3T 7X6
Correspondent:
DAVIDSON SHEEHAN LLP
6836 AUSTIN CENTER BLVD
SUITE 320
AUSTIN, TX 78731
Assignment: 2
Reel/Frame:
059403/0095Recorded: 03/25/2022Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/11/2022
Exec Dt:
02/11/2022
Exec Dt:
01/23/2022
Assignee:
2485 AUGUSTINE DRIVE
SANTA CLARA, CALIFORNIA 95054
Correspondent:
DAVIDSON SHEEHAN LLP
6836 AUSTIN CENTER BLVD
SUITE 320
AUSTIN, TX 78731

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