Patent Assignment Details
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Reel/Frame: | 007198/0814 | |
| Pages: | 2 |
| | Recorded: | 11/10/1994 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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11/26/1996
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Application #:
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08339211
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Filing Dt:
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11/10/1994
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Title:
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METHOD OF DESIGNING A CELL PLACEMENT OF AN INTEGRATED CIRCUIT
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Assignee
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1015, KAMIKODANAKA, NAKAHARA-KU KAWASAKI-SHI, KANAGAWA 211, JAPAN |
KANAGAWA 211,, JAPAN |
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Correspondence name and address
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STAAS & HALSEY
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ATTN: JAMES D. HALSEY, JR.
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700 11TH ST., NW
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SUITE 500
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WASHINGTON, DC 20001
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