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Total properties:
17
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Patent #:
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Issue Dt:
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12/03/1991
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Application #:
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07323779
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Filing Dt:
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03/15/1989
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Title:
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METHOD OF MAKING DENSE FLASH EEPROM SEMICONDUCTOR MEMORY STRUCTURES
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Patent #:
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Issue Dt:
|
04/06/1993
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Application #:
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07422949
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Filing Dt:
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10/17/1989
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Title:
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DEVICE AND METHOD FOR DEFECT HANDLING IN SEMI-CONDUCTOR MEMORY
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Patent #:
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Issue Dt:
|
12/15/1992
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Application #:
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07508273
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Filing Dt:
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04/11/1990
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Title:
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MULTI-STATE EEPROM READ AND WRITE CIRCUITS AND TECHNIQUES
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Patent #:
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Issue Dt:
|
08/30/1994
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Application #:
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07629250
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Filing Dt:
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12/18/1990
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Title:
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DENSE VERTICAL PROGRAMMABLE READ ONLY MEMORY CELL STRUCTURE AND PROCESSES FOR MAKING THEM
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Patent #:
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Issue Dt:
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12/14/1993
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Application #:
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07670246
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Filing Dt:
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03/15/1991
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Title:
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METHOD FOR OPTIMUM ERASING OF EEPROM
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Patent #:
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Issue Dt:
|
11/10/1992
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Application #:
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07734221
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Filing Dt:
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07/22/1991
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Title:
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MULTI-STATE EEPROM READ AND WRITE CIRCUITS AND TECHNIQUES
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Patent #:
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Issue Dt:
|
07/04/1995
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Application #:
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07736733
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Filing Dt:
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07/26/1991
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Title:
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SOLID-STATE MEMORY SYSTEM INCLUDING PLURAL MEMORY CHIPS AND A SERIALIALIZED BUS
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Patent #:
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Issue Dt:
|
05/24/1994
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Application #:
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07919715
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Filing Dt:
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07/24/1992
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Title:
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SEGMENTED COLUMN MEMORY ARRAY
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Patent #:
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Issue Dt:
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06/27/1995
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Application #:
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07948175
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Filing Dt:
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09/21/1992
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Title:
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LATENT DEFECT HANDLING IN EEPROM DEVICES
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|
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Patent #:
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Issue Dt:
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03/22/1994
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Application #:
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07963838
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Filing Dt:
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10/20/1992
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Title:
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FLASH EEPROM SYSTEM
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|
|
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Patent #:
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|
Issue Dt:
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05/23/1995
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Application #:
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07963851
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Filing Dt:
|
10/20/1992
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Title:
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FLASH EEPROM SYSTEM WITH ERASE SECTOR SELECT
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Patent #:
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|
Issue Dt:
|
06/06/1995
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Application #:
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08089175
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Filing Dt:
|
07/08/1993
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Title:
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METHOD AND CIRCUIT FOR SIMULTANEOUSLY PROGRAMMING AND VERIFYING THE PROGRAMMING OF SELECTED EEPROM CELLS
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Patent #:
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Issue Dt:
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01/10/1995
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Application #:
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08117219
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Filing Dt:
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09/03/1993
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|
Title:
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DENSE VERTICAL PROGRAMMABLE READ ONLY MEMORY CELL STRUCTURES AND PROCESSES FOR MAKING THEM
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|
|
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Patent #:
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|
Issue Dt:
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03/07/1995
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Application #:
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08148932
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Filing Dt:
|
11/08/1993
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Title:
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STREAMLINED WRITE OPERATION FOR EEPROM SYSTEM
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|
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Patent #:
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Issue Dt:
|
11/29/1994
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Application #:
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08149602
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Filing Dt:
|
11/08/1993
|
|
Title:
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METHOD FOR OPTIMUM ERASING OF EEPROM
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|
|
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Patent #:
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|
Issue Dt:
|
07/25/1995
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Application #:
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08157573
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Filing Dt:
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11/24/1993
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Title:
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CHARGE PUMP CIRCUIT WITH EXPONETRAL MULTIPLICATION
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|
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Patent #:
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|
Issue Dt:
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08/01/1995
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Application #:
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08252052
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Filing Dt:
|
06/01/1994
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Title:
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FLASH EEPROM ARRAY DATA AND HEADER FILE STRUCTURE
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