|
Total properties:
52
|
|
|
|
Patent #:
|
|
Issue Dt:
|
|
Application #:
|
05861855
|
Filing Dt:
|
|
|
Title:
|
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/1980
|
Application #:
|
05861857
|
Filing Dt:
|
12/19/1977
|
|
Title:
|
TUNER DRIVING MECHANISM PERMITTING PLAY IN LOCATION OF INPUT MEMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/1980
|
Application #:
|
05912410
|
Filing Dt:
|
06/05/1978
|
|
Title:
|
LOW PROFILE PUSHBUTTON TUNER WITH IMPROVED CARRIAGE MOVING MECHANISM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1981
|
Application #:
|
06010746
|
Filing Dt:
|
02/09/1979
|
|
Title:
|
CHEMICAL VAPOR DEPOSITION REACTOR WITH INFRARED REFLECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/1980
|
Application #:
|
06037864
|
Filing Dt:
|
05/10/1979
|
|
Title:
|
METHOD OF OBTAINING POLYCRYSTALLINE SILICON AND WORKPIECE USEFUL THERE IN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1981
|
Application #:
|
06140293
|
Filing Dt:
|
04/14/1980
|
|
Title:
|
METHOD OF COOLING INDUCTION-HEATED VAPOR DEPOSITION APPARATUS AND COOLING APPARATUS THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/1983
|
Application #:
|
06154280
|
Filing Dt:
|
05/29/1980
|
|
Title:
|
MESH GATE V-MOS POWER FET
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/1983
|
Application #:
|
06312188
|
Filing Dt:
|
10/16/1981
|
|
Title:
|
STORAGE LOGIC ARRAY HAVING TWO CONDUCTOR DATA COLUMN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/1984
|
Application #:
|
06352226
|
Filing Dt:
|
02/25/1982
|
|
Title:
|
SINGLE BOBBIN TRANSFORMER HAVING MULTIPLE DELINK WINDINGS AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/1985
|
Application #:
|
06433158
|
Filing Dt:
|
10/06/1982
|
|
Title:
|
SUSCEPTOR FOR RADIANT ABSORPTION HEATER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/1985
|
Application #:
|
06553962
|
Filing Dt:
|
11/21/1983
|
|
Title:
|
REACTOR AND SUSCEPTOR FOR CHEMICAL VAPOR DEPOSITION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/1986
|
Application #:
|
06643064
|
Filing Dt:
|
08/22/1984
|
|
Title:
|
METHOD AND APPARATUS FOR ASSEMBLING SEMICONDUCTOR DEVICES SUCH AS LEDS OR OPTODETECTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/1986
|
Application #:
|
06648672
|
Filing Dt:
|
09/10/1984
|
|
Title:
|
RECTIFIER WITH SLUG CONSTRUCTION AND MOLD FOR FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1987
|
Application #:
|
06703703
|
Filing Dt:
|
02/21/1985
|
|
Title:
|
SCHOTTKY BARRIER DEVICE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1987
|
Application #:
|
06750488
|
Filing Dt:
|
06/27/1985
|
|
Title:
|
METHOD FOR FORMING HIGH YIELD EPITAXIAL WAFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/1988
|
Application #:
|
06784451
|
Filing Dt:
|
10/04/1985
|
|
Title:
|
METHOD FOR FABRICATING A RECTIFYING P-N JUNCTION HAVING IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/1988
|
Application #:
|
06922532
|
Filing Dt:
|
10/23/1986
|
|
Title:
|
SCHOTTKY BARRIER DEVICE WITH DOPED COMPOSITE GUARD RING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/1990
|
Application #:
|
07142737
|
Filing Dt:
|
01/11/1988
|
|
Title:
|
A RECTIFYING P-N JUNCTION HAVING IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS AND METHOD FOR FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/1990
|
Application #:
|
07143916
|
Filing Dt:
|
01/27/1988
|
|
Title:
|
WAFER LEVEL PROCESS FOR FABRICATING PASSINATED SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1989
|
Application #:
|
07150755
|
Filing Dt:
|
02/01/1988
|
|
Title:
|
METHOD FOR SETTING THE THRESHOLD VOLTAGE OF A VERTICAL POWER MOSFET
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/1990
|
Application #:
|
07151066
|
Filing Dt:
|
02/01/1988
|
|
Title:
|
METHOD OF FABRICATING A BRAZED GLASS PRE-PASSIVATED CHIP RECTIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/1989
|
Application #:
|
07164219
|
Filing Dt:
|
03/04/1988
|
|
Title:
|
SQUARE BODY LEADLESS ELECTRICAL DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/1990
|
Application #:
|
07314808
|
Filing Dt:
|
02/24/1989
|
|
Title:
|
BRAZING MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/1990
|
Application #:
|
07315557
|
Filing Dt:
|
02/24/1989
|
|
Title:
|
ALTERNATE PULSE INVERSION ENCODING SCHEME FOR SERIAL DATA TRANSMISSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/1990
|
Application #:
|
07358883
|
Filing Dt:
|
05/30/1989
|
|
Title:
|
METHOD FOR SETTING THE THRESHOLD VOLTAGE OF A POWER MOSFET
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/1990
|
Application #:
|
07365519
|
Filing Dt:
|
06/13/1989
|
|
Title:
|
METHOD OF MAKING A PASSIVATED P-N JUNCTION IN A MESA SEMICONDUCTOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/1991
|
Application #:
|
07404604
|
Filing Dt:
|
09/27/1989
|
|
Title:
|
METHOD FOR FABRICATING A RECTIFYING SEMICONDUCTOR JUNCTION HAVING IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/1991
|
Application #:
|
07480367
|
Filing Dt:
|
02/14/1990
|
|
Title:
|
BRAZED GLASS PRE-PASSIVATED CHIP RECTIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1992
|
Application #:
|
07492117
|
Filing Dt:
|
03/13/1990
|
|
Title:
|
METHOD FOR CONTROLLING THE SWITCHING SPEED OF BIPOLAR POWER DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1992
|
Application #:
|
07684682
|
Filing Dt:
|
04/11/1991
|
|
Title:
|
METHOD FOR CONTROLLING THE SWITCHING SPEED OF BIPOLAR POWER DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1992
|
Application #:
|
07748876
|
Filing Dt:
|
08/23/1991
|
|
Title:
|
SURFACE MOUNTABLE RECTIFIER AND METHOD FOR FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1993
|
Application #:
|
07752749
|
Filing Dt:
|
08/30/1991
|
|
Title:
|
SURFACE MOUNTING DIODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/1996
|
Application #:
|
07811726
|
Filing Dt:
|
12/23/1991
|
|
Title:
|
HERMETIC SURFACE MOUNT PACKAGE FOR A TWO TERMINAL SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1993
|
Application #:
|
07836491
|
Filing Dt:
|
02/18/1992
|
|
Title:
|
LOW CAPACITANCE SILICON TRANSIENT SUPPRESSOR WITH MONOLITHIC STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/1994
|
Application #:
|
07856715
|
Filing Dt:
|
03/24/1992
|
|
Title:
|
SEMICONDUCTOR DEVICES HAVING COPPER TERMINAL LEADS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1992
|
Application #:
|
07884325
|
Filing Dt:
|
05/11/1992
|
|
Title:
|
PASSIVATED MESA SEMICONDUCTOR AND METHOD FOR MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/1994
|
Application #:
|
07917778
|
Filing Dt:
|
07/21/1992
|
|
Title:
|
SURGE PROTECTION CIRCUIT MODULE AND METHOD FOR ASSEMBLING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/1994
|
Application #:
|
07921900
|
Filing Dt:
|
07/29/1992
|
|
Title:
|
METHOD FOR MAKING PASSIVATED MESA SEMICONDUCTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/1994
|
Application #:
|
08015384
|
Filing Dt:
|
02/09/1993
|
|
Title:
|
METHOD FOR FABRICATING A MULTILAYER EPITAXIAL STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/1994
|
Application #:
|
08021130
|
Filing Dt:
|
03/08/1993
|
|
Title:
|
LOW COST METHOD OF FABRICATING EPITAXIAL SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/1994
|
Application #:
|
08082951
|
Filing Dt:
|
07/01/1993
|
|
Title:
|
METHOD OF GROWING A SEMICONDUCTOR MATERIAL BY EPILAXY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/1994
|
Application #:
|
08082952
|
Filing Dt:
|
07/01/1993
|
|
Title:
|
METHOD OF MAKING SEMICONDUCTOR DEVICES USING EPITAXIAL TECHNIQUES TECHNIQUES TO FORM SI/SI-GE INTERFACES AND INVERTING THE MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/1995
|
Application #:
|
08230299
|
Filing Dt:
|
04/20/1994
|
|
Title:
|
SEMICONDUCTOR DEVICES HAVING A MESA STRUCTURE AND METHOD OF FABRICATION FOR IMPROVED SURFACE VOLTAGE BREAKDOWN CHARACTERISTICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/1995
|
Application #:
|
08242877
|
Filing Dt:
|
05/16/1994
|
|
Title:
|
METHOD FOR FABRICATING A MULTILAYER EPITAXIAL STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1996
|
Application #:
|
08273854
|
Filing Dt:
|
07/12/1994
|
|
Title:
|
FABRICATION OF HYBRID SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/1996
|
Application #:
|
08274009
|
Filing Dt:
|
07/12/1994
|
|
Title:
|
AUTOMATED ASSEMBLY OF SEMICONDUCTOR DEVICES USING A PAIR OF LEAD FRAMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/1997
|
Application #:
|
08409762
|
Filing Dt:
|
03/28/1995
|
|
Title:
|
LOW COST METHOD OF FABRICATING SHALLOW JUNCTION, SCHOTTKY SEMI- CONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/1996
|
Application #:
|
08411408
|
Filing Dt:
|
03/28/1995
|
|
Title:
|
GAS FLOW SYSTEM FOR CVD REACTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/1997
|
Application #:
|
08554749
|
Filing Dt:
|
11/07/1995
|
|
Title:
|
MESA SEMICONDUCTOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/1997
|
Application #:
|
08579232
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
AUTOMATED ASSEMBLY OF SEMICONDUCTOR DEVICES USING A PAIR OF LEAD FRAMES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08580071
|
Filing Dt:
|
12/20/1995
|
|
Title:
|
HIGH VOLTAGE SILICON DIODE WITH OPTIMUM PLACEMENT OF SILICON-GERMANIUM LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08649135
|
Filing Dt:
|
05/14/1996
|
|
Title:
|
PLANAR P-N JUNCTION SEMICONDUCTOR STRUCTURE WITH MULTILAYER PASSIVATION
|
|
