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Patent Assignment Details
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Reel/Frame:009639/0900   Pages: 5
Recorded: 12/08/1998
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
04/24/2001
Application #:
09208596
Filing Dt:
12/08/1998
Title:
METHOD OF REDUCING INCIDENCE OF STRESS-INDUCED VOIDING IN SEMICONDUCTOR INTERCONNECT LINES
Assignors
1
Exec Dt:
12/07/1998
2
Exec Dt:
11/24/1998
3
Exec Dt:
11/24/1998
Assignee
1
M/S 68, D 259, P.O. BOX 3453
ONE AMD PLACE
SUNNYVALE, CALIFORNIA 94088
Correspondence name and address
LARIVIERE, GRUBMAN & PAYNE, LLP
FRANK T. KALINSKI II
P.O. BOX 3140
P874, 4 JUSTIN COURT, SUITE A
MONTEREY, CA 93942

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