Patent Assignment Details
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| Reel/Frame: | 010917/0826 | |
| Pages: | 3 |
| | Recorded: | 06/16/2000 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09522047
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Filing Dt:
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03/09/2000
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Title:
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METHOD FOR MANUFACTURING MULTILAYER INTERCONNECTS BY FORMING A TRENCH WITH AN UNDERLYING THROUGH-HOLE IN A LOW DIELECTRIC CONSTANT INSULATOR LAYER
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Assignee
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| 4-1 NISHISHINJUKU 2-CHOME, SHINJUKU-KU |
| TOKYO, JAPAN |
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Correspondence name and address
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EPSON RESEARCH DEVELOPMENT INC.
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MARK P. WATSON
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INTELLECTUAL PROPERTY DEPARTMENT
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150 RIVER OAKS PARKWAY, SUITE 225
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SAN JOSE, CA 95134
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