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Patent Assignment Details
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Reel/Frame:013753/0662   Pages: 3
Recorded: 02/13/2003
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 12
1
Patent #:
Issue Dt:
02/03/2004
Application #:
10208496
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
03/13/2003
Title:
CHIP MANUFACTURING METHOD FOR CUTTING TEST PADS FROM INTEGRATED CIRCUITS BY SECTIONING CIRCUIT CHIPS FROM CIRCUIT SUBSTRATE
2
Patent #:
Issue Dt:
02/04/2003
Application #:
10212658
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
12/12/2002
Title:
METHOD OF MAKING LOADLESS FOUR-TRANSISTOR MRMORY CELL WITH DIFFERENT GATE INSULATION THICKNESSES FOR N-CHANNEL DRIVE TRANSISTORS AND P-CHANNEL ACCESS TRANSISTORS
3
Patent #:
Issue Dt:
04/20/2004
Application #:
10223807
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
12/26/2002
Title:
LOW-AMPLITUDE DRIVER CIRCUIT
4
Patent #:
Issue Dt:
08/09/2005
Application #:
10228653
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/06/2003
Title:
SYSTEM CLOCK SYNCHRONIZATION CIRCUIT
5
Patent #:
Issue Dt:
07/06/2004
Application #:
10233219
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
12/26/2002
Title:
FLIP CHIP TYPE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
6
Patent #:
NONE
Issue Dt:
Application #:
10237770
Filing Dt:
09/09/2002
Publication #:
Pub Dt:
03/13/2003
Title:
Manufacturing method of semiconductor device
7
Patent #:
NONE
Issue Dt:
Application #:
10253295
Filing Dt:
09/24/2002
Publication #:
Pub Dt:
03/27/2003
Title:
Wiring substrate for small electronic component and manufacturing method
8
Patent #:
Issue Dt:
10/26/2004
Application #:
10256364
Filing Dt:
09/27/2002
Publication #:
Pub Dt:
01/30/2003
Title:
SEMICONDUCTOR DEVICE HAVING REINFORCED COUPLING BETWEEN SOLDER BALLS AND SUBSTRATE
9
Patent #:
Issue Dt:
06/08/2004
Application #:
10271007
Filing Dt:
10/15/2002
Publication #:
Pub Dt:
04/17/2003
Title:
MAGNETIC MEMORY AND METHOD OF ITS MANUFACTURE
10
Patent #:
Issue Dt:
03/16/2004
Application #:
10273161
Filing Dt:
10/17/2002
Publication #:
Pub Dt:
04/24/2003
Title:
INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREFOR
11
Patent #:
Issue Dt:
02/01/2005
Application #:
10273313
Filing Dt:
10/17/2002
Publication #:
Pub Dt:
04/24/2003
Title:
INTEGRATED CIRCUIT INCLUDING AN INDUCTOR, ACTIVE LAYERS WITH ISOLATION DIELECTRICS, AND MULTIPLE INSULATION LAYERS
12
Patent #:
Issue Dt:
01/11/2005
Application #:
10277512
Filing Dt:
10/22/2002
Publication #:
Pub Dt:
05/22/2003
Title:
LEVENSON PHASE SHIFT MASK AND METHOD FOR FORMING FINE PATTERN BY USING THE SAME
Assignor
1
Exec Dt:
11/01/2002
Assignee
1
1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI
KANAGAWA, JAPAN 211-8668
Correspondence name and address
KATTEN MUCHIN ZAVIS ROSENMAN
575 MADISON AVE.
IP DEPARTMENT 15TH FL.
NEW YORK, NY 10022-2585

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