Patent Assignment Details
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| Reel/Frame: | 014159/0277 | |
| Pages: | 2 |
| | Recorded: | 06/16/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10393921
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Filing Dt:
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03/24/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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DELAY DIAGNOSIS METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT, COMPUTER PROGRAM PRODUCT FOR DIAGNOSING DELAY OF SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER READABLE RECORDING MEDIUM RECORDING PROGRAM THEREON
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Assignees
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| 6, KANDA SURUGADAI 4-CHOME CHIYODA-KU |
| TOKYO, JAPAN |
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| 456, SAKAI, NAKAI-MACHI, ASHIGARAKAMI-GUN |
| KANAGAWA, JAPAN |
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Correspondence name and address
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MATTINGLY, STANGER & MALUR, P.C.
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JOHN R. MATTINGLY
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1800 DIAGONAL ROAD, SUITE 370
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ALEXANDRIA, VA 22314
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