Patent Assignment Details
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Reel/Frame: | 017190/0469 | |
| Pages: | 3 |
| | Recorded: | 11/03/2005 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11265962
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Filing Dt:
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11/03/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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Method for improving the timing resolution of DLL controlled delay lines
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Assignees
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4815 LIST DRIVE, SUITE 109 |
COLORADO SPRINGS, COLORADO 80919 |
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6-7-35 KITA-SHINAGAWA SHINAGAWA-KU |
TOKYO, JAPAN 141-0001 |
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Correspondence name and address
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WILLIAM J. KUBIDA
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HOGAN & HARTSON LLP
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ONE TABOR CENTER
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1200 17TH STREET, SUITE 1500
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DENVER, COLORADO 80202
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05/14/2024 04:50 PM
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