Patent Assignment Details
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Reel/Frame: | 017383/0019 | |
| Pages: | 2 |
| | Recorded: | 12/20/2005 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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11311655
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Filing Dt:
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12/20/2005
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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MULTILAYERED CIRCUIT BOARD DESIGN SUPPORT METHOD, PROGRAM, AND APPARATUS FOR SUPPRESSING THERMAL DIFFUSION FROM SOLID-LAYER CONDUCTOR TO THROUGH HOLE
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Assignee
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1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI |
KANAGAWA, JAPAN 211-8588 |
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Correspondence name and address
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STAAS & HALSEY LLP
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ATTENTION: DAVID M. PITCHER
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1201 NEW YORK AVE., NW., SUITE 700
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WASHINGTON, D.C. 20005
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