Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 017866/0174 | |
| Pages: | 3 |
| | Recorded: | 05/08/2006 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11373986
|
Filing Dt:
|
03/14/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
|
Title:
|
SYSTEM OF TESTING SEMICONDUCTOR DEVICES, A METHOD FOR TESTING SEMICONDUCTOR DEVICES, AND A METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES
|
|
|
Assignee
|
|
|
|
|
| 1-1, SHIBAURA 1-CHOME |
| MINATO-KU, TOKYO, JAPAN |
|
|
Correspondence name and address
|
| |
FINNEGAN, HENDERSON, FARABOW, GARRETT &
|
| |
DUNNER, L.L.P.
|
| |
ERNEST F. CHAPMAN
|
| |
901 NEW YORK AVENUE, NW
|
| |
WASHINGTON, DC 20001-4413
|
Search Results as of:
05/04/2024 11:34 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
