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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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09715748
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Filing Dt:
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11/17/2000
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Title:
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METHOD OF FORMING A DIODE FOR INTEGRATION WITH A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A TRANSISTOR DEVICE HAVING AN INTEGRATED DIODE
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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10122169
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Filing Dt:
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04/15/2002
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Title:
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METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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10123657
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Filing Dt:
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04/17/2002
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Title:
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METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH A LOW PERMITTIVITY REGION
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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10184539
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Filing Dt:
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06/28/2002
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Publication #:
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Pub Dt:
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11/07/2002
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Title:
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POWER CONVERTER CIRCUIT AND METHOD FOR CONTROLLING
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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10194165
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Filing Dt:
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07/15/2002
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Title:
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METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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10195166
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Filing Dt:
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07/16/2002
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Title:
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METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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11/25/2003
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Application #:
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10228399
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Filing Dt:
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08/27/2002
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Title:
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METHOD OF FORMING A LOW VOLTAGE SEMICONDUCTOR STORAGE DEVICE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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10254274
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Filing Dt:
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09/25/2002
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Title:
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METHOD OF FORMING A VOLTAGE DETECTION DEVICE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10376395
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Filing Dt:
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03/03/2003
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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BUFFER CIRCUIT WITH PROGRAMMABLE SWITCHING THRESHOLDS
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10384144
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Filing Dt:
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03/10/2003
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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LDMOS TRANSISTOR WITH ENHANCED TERMINATION REGION FOR HIGH BREAKDOWN VOLTAGE WITH LOW ON-RESISTANCE
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10387206
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Filing Dt:
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03/13/2003
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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HYBRID REGULATOR WITH SWITCHING AND LINEAR SECTIONS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10388252
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Filing Dt:
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03/12/2003
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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METHOD OF FORMING A POWER SYSTEM AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10406106
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Filing Dt:
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04/04/2003
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Publication #:
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Pub Dt:
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11/06/2003
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Title:
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LOW VOLTAGE TRANSIENT VOLTAGE SUPPRESSOR AND METHOD OF MAKING
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10412507
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Filing Dt:
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04/14/2003
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Publication #:
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Pub Dt:
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10/14/2004
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Title:
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METHOD OF FORMING A LOW QUIESCENT CURRENT VOLTAGE REGULATOR AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10426515
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Filing Dt:
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05/01/2003
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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Method of forming a body contact of a transistor and structure therefor
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10429399
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Filing Dt:
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05/06/2003
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Title:
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METHOD OF FORMING A PROTECTION CIRCUIT AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10436737
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Filing Dt:
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05/14/2003
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Publication #:
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Pub Dt:
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11/18/2004
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Title:
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HIGH SPEED RECEIVER WITH WIDE INPUT VOLTAGE RANGE
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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10465733
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Filing Dt:
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06/20/2003
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Title:
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POWER FACTOR CORRECTION METHOD WITH ZERO CROSSING DETECTION AND ADJUSTABLE STORED REFERENCE VOLTAGE
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Patent #:
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Issue Dt:
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10/23/2007
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Application #:
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10512767
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Filing Dt:
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10/28/2004
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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METHOD OF FORMING A REFERENCE VOLTAGE AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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10512768
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Filing Dt:
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10/28/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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POWER FACTOR CORRECTION CIRCUIT AND METHOD OF VARYING SWITCHING FREQUENCY
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Patent #:
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Issue Dt:
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06/05/2007
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Application #:
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10524894
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Filing Dt:
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09/07/2005
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Publication #:
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Pub Dt:
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12/29/2005
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Title:
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SEMICONDUCTOR DEVICE WITH WIRE BOND INDUCTOR AND METHOD
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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10546491
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Filing Dt:
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08/22/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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LOW AUDIBLE NOISE POWER SUPPLY METHOD AND CONTROLLER THEREFOR
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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10548563
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Filing Dt:
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09/09/2005
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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METHOD OF MARKING A LOW PROFILE PACKAGED SEMICONDUCTOR DEVICE
|
|
|
|
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Patent #:
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|
Issue Dt:
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11/04/2008
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Application #:
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10549543
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Filing Dt:
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09/19/2005
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|
Publication #:
|
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Pub Dt:
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12/28/2006
| | | | |
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Title:
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POWER SUPPLY CONTROLLER METHOD AND STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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10/28/2008
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Application #:
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10566565
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Filing Dt:
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06/27/2006
|
|
Publication #:
|
|
Pub Dt:
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10/25/2007
| | | | |
|
Title:
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NEGATIVE CURRENT COMPENSATION METHOD AND CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2004
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Application #:
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10603258
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Filing Dt:
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06/26/2003
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|
Publication #:
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Pub Dt:
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12/30/2004
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Title:
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DIRECT CHIP ATTACH STRUCTURE AND METHOD
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|
|
|
|
Patent #:
|
|
Issue Dt:
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11/16/2004
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Application #:
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10623397
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Filing Dt:
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07/18/2003
|
|
Title:
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VERTICAL COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
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Application #:
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10632636
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Filing Dt:
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08/04/2003
|
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING REGIONS OF LOW SUBSTRATE CAPACITANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
11009584
|
Filing Dt:
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12/13/2004
|
|
Publication #:
|
|
Pub Dt:
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06/15/2006
| | | | |
|
Title:
|
METHOD OF FORMING A WIDE BANDWIDTH DIFFERENTIAL AMPLIFIER AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11040334
|
Filing Dt:
|
01/24/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/09/2005
| | | | |
|
Title:
|
LEAD-FREE INTEGRATED CIRCUIT PACKAGE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11041710
|
Filing Dt:
|
01/25/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
|
Title:
|
HIGH VOLTAGE SENSOR DEVICE AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
11044452
|
Filing Dt:
|
01/28/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
|
Title:
|
CROSS-TALK REDUCTION CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11055638
|
Filing Dt:
|
02/11/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
INTEGRATED SEMICONDUCTOR INDUCTOR AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
11056783
|
Filing Dt:
|
02/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
DELAY CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
11057138
|
Filing Dt:
|
02/15/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE EDGE TERMINATION STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11057139
|
Filing Dt:
|
02/15/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
SUPERJUNCTION SEMICONDUCTOR DEVICE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
11057140
|
Filing Dt:
|
02/15/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING DEEP TRENCH CHARGE COMPENSATION REGIONS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
11060691
|
Filing Dt:
|
02/18/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
|
Title:
|
TRANSLATOR CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11084471
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Filing Dt:
|
03/21/2005
|
|
Publication #:
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|
Pub Dt:
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09/21/2006
| | | | |
|
Title:
|
SCHOTTKY DIODE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
11084524
|
Filing Dt:
|
03/21/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
|
Title:
|
SCHOTTKY DIODE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11084643
|
Filing Dt:
|
03/21/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
|
Title:
|
FAN OUT BUFFER AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11093381
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Filing Dt:
|
03/31/2005
|
|
Publication #:
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Pub Dt:
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10/12/2006
| | | | |
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Title:
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BI-DIRECTIONAL TRANSISTOR AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
11095135
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Filing Dt:
|
04/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
|
Title:
|
METHOD OF FORMING AN INTEGRATED POWER DEVICE AND STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11095136
|
Filing Dt:
|
04/01/2005
|
|
Publication #:
|
|
Pub Dt:
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10/05/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING ENHANCED PERFORMANCE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11099895
|
Filing Dt:
|
04/07/2005
|
|
Publication #:
|
|
Pub Dt:
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10/12/2006
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE HAVING FIELD STABILIZATION FILM AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
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Application #:
|
11102173
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Filing Dt:
|
04/11/2005
|
|
Publication #:
|
|
Pub Dt:
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08/18/2005
| | | | |
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Title:
|
LDMOS TRANSISTOR WITH ENHANCED TERMINATION REGION FOR HIGH BREAKDOWN VOLTAGE WITH ON-RESISTANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
11105222
|
Filing Dt:
|
04/14/2005
|
|
Publication #:
|
|
Pub Dt:
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08/18/2005
| | | | |
|
Title:
|
POWER SWITCH STRUCTURE WITH LOW RDSON AND LOW CURRENT LIMIT AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11105255
|
Filing Dt:
|
04/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
|
Title:
|
VOLTAGE SENSE CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11112570
|
Filing Dt:
|
04/25/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING SCREENING ELECTRODE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11112597
|
Filing Dt:
|
04/25/2005
|
|
Publication #:
|
|
Pub Dt:
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10/26/2006
| | | | |
|
Title:
|
POWER SEMICONDUCTOR DEVICE HAVING IMPROVED PERFORMANCE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2009
|
Application #:
|
11119106
|
Filing Dt:
|
05/02/2005
|
|
Publication #:
|
|
Pub Dt:
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11/02/2006
| | | | |
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
11132949
|
Filing Dt:
|
05/20/2005
|
|
Publication #:
|
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Pub Dt:
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11/23/2006
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE HAVING TRENCH STRUCTURES AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
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Application #:
|
11133885
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Filing Dt:
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05/23/2005
|
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Publication #:
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Pub Dt:
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11/23/2006
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Title:
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METHOD FOR REGULATING AN OUTPUT SIGNAL AND CIRCUIT THEREFOR
|
|
|
|
|
Patent #:
|
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Issue Dt:
|
04/07/2009
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Application #:
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11137872
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Filing Dt:
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05/27/2005
|
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
|
SECONDARY SIDE CONTROLLER AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
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Application #:
|
11144417
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Filing Dt:
|
06/06/2005
|
|
Publication #:
|
|
Pub Dt:
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12/07/2006
| | | | |
|
Title:
|
METHOD OF FORMING AN IN-RUSH LIMITER AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11146772
|
Filing Dt:
|
06/08/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
|
Title:
|
POWER SYSTEM INHIBIT METHOD AND DEVICE AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11171018
|
Filing Dt:
|
07/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
|
Title:
|
METHOD FOR REGULATING TEMPERATURE AND CIRCUIT THEREFOR
|
|
|
|
|
Patent #:
|
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Issue Dt:
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11/25/2008
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Application #:
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11181332
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Filing Dt:
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07/14/2005
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Publication #:
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Pub Dt:
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01/18/2007
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Title:
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SINGLE PIN MULTI-FUNCTION SIGNAL DETECTION METHOD AND STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
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03/24/2009
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Application #:
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11185400
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Filing Dt:
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07/21/2005
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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POWER SUPPLY CONTROLLER AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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03/16/2010
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Application #:
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11188093
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Filing Dt:
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07/25/2005
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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POWER OVERLOAD DETECTION METHOD AND STRUCTURE THERFOR
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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11190226
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Filing Dt:
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07/28/2005
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Publication #:
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Pub Dt:
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02/01/2007
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Title:
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CURRENT REGULATOR AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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06/03/2008
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Application #:
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11193724
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Filing Dt:
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08/01/2005
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Publication #:
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Pub Dt:
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02/01/2007
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Title:
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SEMICONDUCTOR STRUCTURE WITH IMPROVED ON RESISTANCE AND BREAKDOWN VOLTAGE PERFORMANCE
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11193725
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Filing Dt:
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08/01/2005
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Publication #:
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Pub Dt:
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02/01/2007
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Title:
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SEMICONDUCTOR STRUCTURE WITH IMPROVED ON RESISTANCE AND BREAKDOWN VOLTAGE PERFORMANCE
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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11200789
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Filing Dt:
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08/11/2005
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Publication #:
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Pub Dt:
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02/15/2007
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Title:
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MULTI-CURRENT BATTERY CHARGER CIRCUIT AND METHOD THEREFOR
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|
|
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11202965
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Filing Dt:
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08/15/2005
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Publication #:
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Pub Dt:
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02/15/2007
| | | | |
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Title:
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Semiconductor component and method of manufacture
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|
|
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Patent #:
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|
Issue Dt:
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01/13/2009
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Application #:
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11205435
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Filing Dt:
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08/18/2005
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Publication #:
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Pub Dt:
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02/22/2007
| | | | |
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Title:
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METHOD OF FORMING A START-UP DEVICE AND STRUCTURE THEREFOR
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|
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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11205464
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Filing Dt:
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08/18/2005
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Publication #:
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Pub Dt:
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02/22/2007
| | | | |
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Title:
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ENCAPSULATED CHIP SCALE PACKAGE HAVING FLIP-CHIP ON LEAD FRAME STRUCTURE AND METHOD
|
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|
|
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Patent #:
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Issue Dt:
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06/03/2008
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Application #:
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11231069
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Filing Dt:
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09/21/2005
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Publication #:
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Pub Dt:
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03/22/2007
| | | | |
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Title:
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METHOD OF FORMING AN INTEGRATED VOLTAGE PROTECTION DEVICE AND STRUCTURE
|
|
|
|
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Patent #:
|
|
Issue Dt:
|
06/15/2010
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Application #:
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11232757
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Filing Dt:
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09/23/2005
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Publication #:
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Pub Dt:
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03/29/2007
| | | | |
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Title:
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METHOD OF FORMING A LOW RESISTANCE SEMICONDUCTOR CONTACT AND STRUCTURE THEREFOR
|
|
|
|
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Patent #:
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|
Issue Dt:
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11/27/2007
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Application #:
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11238868
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Filing Dt:
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09/30/2005
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Publication #:
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Pub Dt:
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04/05/2007
| | | | |
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Title:
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METHOD OF FORMING A SELF-ALIGNED TRANSISTOR
|
|
|
|
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Patent #:
|
|
Issue Dt:
|
10/13/2009
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Application #:
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11243195
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
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04/05/2007
| | | | |
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Title:
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METHOD OF FORMING A MOLDED ARRAY PACKAGE DEVICE HAVING AN EXPOSED TAB AND STRUCTURE
|
|
|
|
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Patent #:
|
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Issue Dt:
|
12/09/2008
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Application #:
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11256409
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Filing Dt:
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10/24/2005
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Publication #:
|
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Pub Dt:
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04/26/2007
| | | | |
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Title:
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METHOD OF FORMING A TRENCH SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
|
|
|
|
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Patent #:
|
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Issue Dt:
|
09/15/2009
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Application #:
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11259981
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
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Title:
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METHOD OF FORMING A LEADED MOLDED ARRAY PACKAGE
|
|
|
|
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Patent #:
|
|
Issue Dt:
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01/22/2008
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Application #:
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11264107
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Filing Dt:
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11/02/2005
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
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Title:
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METHOD OF FORMING A POWER SUPPLY CONTROLLER AND DEVICE THEREFOR
|
|
|
|
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Patent #:
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Issue Dt:
|
08/14/2007
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Application #:
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11272359
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Filing Dt:
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11/14/2005
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
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Title:
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DIAGNOSTIC CIRCUIT AND METHOD THEREFOR
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/03/2008
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Application #:
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11281141
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Filing Dt:
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11/18/2005
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Publication #:
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Pub Dt:
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05/24/2007
| | | | |
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Title:
|
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURE
|
|
|
|
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Patent #:
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NONE
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Issue Dt:
|
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Application #:
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11281160
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Filing Dt:
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11/18/2005
|
|
Publication #:
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Pub Dt:
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05/24/2007
| | | | |
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Title:
|
Semiconductor component and method of manufacture
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
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Application #:
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11282021
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Filing Dt:
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11/18/2005
|
|
Publication #:
|
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Pub Dt:
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05/24/2007
| | | | |
|
Title:
|
OUTPUT AMPLIFIER STRUCTURE WITH BIAS COMPENSATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
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Application #:
|
11285968
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Filing Dt:
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11/25/2005
|
|
Publication #:
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Pub Dt:
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04/20/2006
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING REGIONS OF LOW SUBSTRATE CAPACITANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
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Application #:
|
11286979
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Filing Dt:
|
11/28/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2007
| | | | |
|
Title:
|
MULTI-PHASE POWER SUPPLY CONTROLLER AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
11305526
|
Filing Dt:
|
12/19/2005
|
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
|
Title:
|
ENCAPSULATED ELECTRONIC DEVICE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11311824
|
Filing Dt:
|
12/20/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGE STRUCTURE FOR VERTICAL MOUNT AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11317213
|
Filing Dt:
|
12/22/2005
|
|
Title:
|
THYRISTOR AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
11317340
|
Filing Dt:
|
12/22/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
|
Title:
|
THYRISTOR AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
11324072
|
Filing Dt:
|
01/03/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
|
Title:
|
FAULT CONTROL CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11337236
|
Filing Dt:
|
01/23/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
|
Title:
|
SWITCHING POWER SUPPLY CONTROLLER WITH IMPROVED EFFECIENCY AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11339110
|
Filing Dt:
|
01/26/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
|
Title:
|
POWER SUPPLY CONTROLLER AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11345789
|
Filing Dt:
|
02/03/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
|
Title:
|
SCHOTTKY DIODE STRUCTURE WITH ENHANCED BREAKDOWN VOLTAGE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
11355161
|
Filing Dt:
|
02/16/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
|
Title:
|
METHOD OF FORMING A FLOATING CHARGE PUMP AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11357878
|
Filing Dt:
|
02/17/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
|
Title:
|
METHOD FOR NULLIFYING TEMPERATURE DEPENDENCE AND CIRCUIT THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11367626
|
Filing Dt:
|
03/06/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
|
Title:
|
BI-DIRECTIONAL TRANSISTOR WITH BY-PASS PATH AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11367627
|
Filing Dt:
|
03/06/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
|
Title:
|
METHOD OF FORMING AN MOS TRANSISTOR AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
11384161
|
Filing Dt:
|
03/20/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
|
Title:
|
POWER SEMICONDUCTOR DEVICE HAVING IMPROVED PERFORMANCE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11389639
|
Filing Dt:
|
03/27/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
|
Title:
|
METHOD OF FORMING AN EPROM CELL AND STRUCTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
11399523
|
Filing Dt:
|
04/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/11/2007
| | | | |
|
Title:
|
LED CONTROL CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
11403978
|
Filing Dt:
|
04/14/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11403979
|
Filing Dt:
|
04/14/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
|
Title:
|
LINEAR REGULATOR AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
11416506
|
Filing Dt:
|
05/02/2006
|
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
|
Title:
|
SHUNT PROTECTION CIRCUIT AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11422733
|
Filing Dt:
|
06/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
|
Title:
|
DISHWASHER
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11424222
|
Filing Dt:
|
06/14/2006
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
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Title:
|
CIRCUIT AND MATHOD FOR REGULATING VOLTAGE
|
|
