skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:023987/0267   Pages: 4
Recorded: 02/24/2010
Attorney Dkt #:1823-0147PUS1
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
12665529
Filing Dt:
02/24/2010
Publication #:
Pub Dt:
07/22/2010
Title:
METHOD FOR PROTECTING SEMICONDUCTOR WAFER AND PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE
Assignors
1
Exec Dt:
12/24/2009
2
Exec Dt:
01/25/2010
Assignees
1
2500 HAGISONO
CHIGASAKI-SHI, KANAGAWA, JAPAN 253-8543
2
ROOM 302, NOBORITO HIGHDENS, 2578 NOBORITO, TAMA-KU
KAWASAKI-SHI, KANAGAWA, JAPAN 214-0014
Correspondence name and address
BIRCH, STEWART, KOLASCH & BIRCH, LLP
P. O. BOX 747
FALLS CHURCH, VA 22040-0747

Search Results as of: 05/06/2024 04:13 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT