Patent Assignment Details
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Reel/Frame: | 025663/0568 | |
| Pages: | 7 |
| | Recorded: | 01/19/2011 | | |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE THIRD INVENTOR (CHIH-SHENG KUO) ON THE ASSIGNMENT PREVIOUSLY RECORDED ON REEL 015299 FRAME 0316. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECT NAME OF THE THIRD INVENTOR SHOULD BE CHIH-SHENG KUO. |
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Total properties:
1
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10838343
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Filing Dt:
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05/05/2004
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Publication #:
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Pub Dt:
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07/21/2005
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Title:
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PROCESS OF FORMING HIGH-K GATE DIELECTRIC LAYER FOR METAL OXIDE SEMICONDUCTOR TRANSISTOR
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Assignee
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NO. 195, SEC. 4, CHUNG-HSING RD., CHU-TUNG |
HSINCHU, TAIWAN |
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Correspondence name and address
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TRANSPACIFIC IP II LTD.
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ROOM 201, 2ND FLOOR, NO. 205
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DUNHUA NORTH ROAD
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TAIPEI CITY, 105 TAIWAN
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