USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	027921/0579			Pages:	8
		Recorded:	03/23/2012
Attorney Dkt #:	5-50619
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14

Patent #:	5663665	Issue Dt:	09/02/1997	Application #:	08564597	Filing Dt:	11/29/1995
Title:	MEANS FOR CONTROL LIMITS FOR DELAY LOCKED LOOP

Patent #:	5821770	Issue Dt:	10/13/1998	Application #:	08640032	Filing Dt:	04/30/1996
Title:	OPTION DECODING WITH ON-CHIP ELECTRICAL FUSES

Patent #:	5809026	Issue Dt:	09/15/1998	Application #:	08705688	Filing Dt:	08/29/1996
Title:	MULTI-PORT NETWORK INTERFACE

Patent #:	6108301	Issue Dt:	08/22/2000	Application #:	08923495	Filing Dt:	09/04/1997
Title:	CIRCUIT, ARCHITECTURE AND METHOD FOR REDUNDANT DATA COMMUNICATIONS LINKS

Patent #:	6504849	Issue Dt:	01/07/2003	Application #:	08934921	Filing Dt:	09/22/1997
Title:	FIBER AUTO-NEGOTIATION

Patent #:	6072337	Issue Dt:	06/06/2000	Application #:	09216465	Filing Dt:	12/18/1998
Title:	PHASE DETECTOR

Patent #:	6225831	Issue Dt:	05/01/2001	Application #:	09586646	Filing Dt:	06/05/2000
Title:	Phase Detector

Patent #:	6563390	Issue Dt:	05/13/2003	Application #:	09753063	Filing Dt:	12/29/2000
Title:	DIGITALLY COMPENSATED VOLTAGE CONTROLLED OSCILLATOR

Patent #:	6563340	Issue Dt:	05/13/2003	Application #:	09862668	Filing Dt:	05/21/2001
Title:	ARCHITECTURE FOR IMPLEMENTING TWO CHIPS IN A PACKAGE

Patent #:	7359407	Issue Dt:	04/15/2008	Application #:	10228640	Filing Dt:	08/27/2002
Title:	DATA INTERFACE THAT IS CONFIGURABLE INTO SEPARATE MODES OF OPERATION FOR SUB-BIT DE-SKEWING OF PARALLEL-FED DATA SIGNALS

Patent #:	7420975	Issue Dt:	09/02/2008	Application #:	10327524	Filing Dt:	12/20/2002
Title:	METHOD AND APPARATUS FOR A HIGH-SPEED FRAME TAGGER

Patent #:	7545764	Issue Dt:	06/09/2009	Application #:	10993899	Filing Dt:	11/19/2004
Title:	SYNCHRONIZED CODE RECOGNITION

Patent #:	8135029	Issue Dt:	03/13/2012	Application #:	12192318	Filing Dt:	08/15/2008
Title:	METHOD AND APPARATUS FOR A HIGH-SPEED FRAME TAGGER

Patent #:	8315202	Issue Dt:	11/20/2012	Application #:	12467909	Filing Dt:	05/18/2009
Title:	SYNCHRONIZED CODE RECOGNITION

Assignor

Exec Dt:

02/28/2012

Assignee

160 GREENTREE DRIVE

SUITE 101

DOVER, DELAWARE 19904

Correspondence name and address
	KEVAN L. MORGAN, ESQ.
	CHRISTENSEN O'CONNOR JOHNSON KINDNESS
	1420 FIFTH AVENUE, SUITE 2800
	SEATTLE, WA 98101-2347

Search Results as of: 05/22/2024 01:33 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6