Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 034369/0576 | |
| Pages: | 9 |
| | Recorded: | 11/20/2014 | | |
Attorney Dkt #: | 0084567-885US0 |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTOR EIICHI FUJIKAWA PREVIOUSLY RECORDED ON REEL 034120 FRAME 0820. ASSIGNOR(S) HEREBY CONFIRMS THE INVENTOR EIICHI FUJIKURA. |
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Total properties:
1
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Patent #:
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Issue Dt:
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01/26/2016
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Application #:
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14320103
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Filing Dt:
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06/30/2014
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Publication #:
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Pub Dt:
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12/31/2015
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Title:
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NAND Flash Memory Integrated Circuits and Processes with Controlled Gate Height
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Assignee
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TWO LEGACY TOWN CENTER, 6900 NORTH DALLAS PARKWAY |
PLANO, TEXAS 75024 |
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Correspondence name and address
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DAVIS WRIGHT TREMAINE LLP
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1201 THIRD AVENUE, SUITE 2200
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SEATTLE, WA 98101
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