USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	034715/0305			Pages:	29
		Recorded:	12/30/2014
Attorney Dkt #:	F153289
Conveyance:	TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL

Total properties: 146
Page 1 of 2
Pages: 1 2

1

Patent #:	5966603	Issue Dt:	10/12/1999	Application #:	08873384	Filing Dt:	06/11/1997
Title:	NROM FABRICATION METHOD WITH A PERIPHERY PORTION

2

Patent #:	5999476	Issue Dt:	12/07/1999	Application #:	08976303	Filing Dt:	11/21/1997
Title:	BIOS MEMORY AND MULTIMEDIA DATA STORAGE COMBINATION

3

Patent #:	6134146	Issue Dt:	10/17/2000	Application #:	09166385	Filing Dt:	10/05/1998
Title:	WORDLINE DRIVER FOR FLASH ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY (EEPROM)

4

Patent #:	6295571	Issue Dt:	09/25/2001	Application #:	09273430	Filing Dt:	03/19/1999
Title:	SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS

5

Patent #:	6484270	Issue Dt:	11/19/2002	Application #:	09304519	Filing Dt:	05/04/1999
Title:	ELECTRIC DEVICE WITH FLASH MEMORY BUILT-IN

6

Patent #:	6297096	Issue Dt:	10/02/2001	Application #:	09365369	Filing Dt:	07/30/1999
Title:	NROM FABRICATION METHOD

7

Patent #:	6201747	Issue Dt:	03/13/2001	Application #:	09409542	Filing Dt:	09/30/1999
Title:	METHOD AND APPARATUS FOR MEASURING SUBTHRESHOLD CURRENT IN A MEMORY ARRAY

8

Patent #:	6178129	Issue Dt:	01/23/2001	Application #:	09421762	Filing Dt:	10/19/1999
Title:	SEPARATE OUTPUT POWER SUPPLY TO REDUCE OUTPUT NOISE FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE

9

Patent #:	6327183	Issue Dt:	12/04/2001	Application #:	09480868	Filing Dt:	01/10/2000
Title:	NONLINEAR STEPPED PROGRAMMING VOLTAGE

10

Patent #:	6243291	Issue Dt:	06/05/2001	Application #:	09504186	Filing Dt:	02/15/2000
Title:	Two-stage pipeline sensing for page mode flash memory

11

Patent #:	6246610	Issue Dt:	06/12/2001	Application #:	09511652	Filing Dt:	02/22/2000
Title:	Symmetrical program and erase scheme to improve erase time degradation in NAND devices

12

Patent #:	6297988	Issue Dt:	10/02/2001	Application #:	09513402	Filing Dt:	02/25/2000
Title:	MODE INDICATOR FOR MULTI-LEVEL MEMORY

13

Patent #:	6304487	Issue Dt:	10/16/2001	Application #:	09514404	Filing Dt:	02/28/2000
Title:	Register driven means to control programming voltages

14

Patent #:	6396741	Issue Dt:	05/28/2002	Application #:	09563923	Filing Dt:	05/04/2000
Title:	A METHOD OF PROGRAMMING NONVOLATILE MEMORY CELLS".

15

Patent #:	6407960	Issue Dt:	06/18/2002	Application #:	09654831	Filing Dt:	09/01/2000
Title:	ARRANGEMENT FOR PROGRAMMING SELECTED DEVICE REGISTERS DURING INITIALIZATION FROM AN EXTERNAL MEMORY

16

Patent #:	6463516	Issue Dt:	10/08/2002	Application #:	09663765	Filing Dt:	09/18/2000
Title:	VARIABLE SECTOR SIZE FOR A HIGH DENSITY FLASH MEMORY DEVICE

17

Patent #:	6529410	Issue Dt:	03/04/2003	Application #:	09665916	Filing Dt:	09/20/2000
Title:	NAND ARRAY STRUCTURE AND METHOD WITH BURIED LAYER

18

Patent #:	6297993	Issue Dt:	10/02/2001	Application #:	09712382	Filing Dt:	11/13/2000
Title:	Acceleration voltage implementation for a high density flash memory device

19

Patent #:	6928001	Issue Dt:	08/09/2005	Application #:	09730586	Filing Dt:	12/07/2000
Publication #:	US20040222437	Pub Dt:	11/11/2004
Title:	PROGRAMMING AND ERASING METHODS FOR AN NON-VOLATILE MEMORY CELL

20

Patent #:	6775741	Issue Dt:	08/10/2004	Application #:	09768348	Filing Dt:	01/25/2001
Publication #:	US20020029321	Pub Dt:	03/07/2002
Title:	CACHE SYSTEM WITH LIMITED NUMBER OF TAG MEMORY ACCESSES

21

Patent #:	6400624	Issue Dt:	06/04/2002	Application #:	09794479	Filing Dt:	02/26/2001
Title:	CONFIGURE REGISTERS AND LOADS TO TAILOR A MULTI-LEVEL CELL FLASH DESIGN

22

Patent #:	6385093	Issue Dt:	05/07/2002	Application #:	09822995	Filing Dt:	03/30/2001
Title:	I/O partitioning system and methodology to reduce band-to-band tunneling current during erase

23

Patent #:	6535434	Issue Dt:	03/18/2003	Application #:	09827756	Filing Dt:	04/05/2001
Publication #:	US20020145918	Pub Dt:	10/10/2002
Title:	ARCHITECTURE AND SCHEME FOR A NON-STROBED READ SEQUENCE

24

Patent #:	6584017	Issue Dt:	06/24/2003	Application #:	09827757	Filing Dt:	04/05/2001
Publication #:	US20020145911	Pub Dt:	10/10/2002
Title:	METHOD FOR PROGRAMMING A REFERENCE CELL

25

Patent #:	6519672	Issue Dt:	02/11/2003	Application #:	09854351	Filing Dt:	05/10/2001
Publication #:	US20020026493	Pub Dt:	02/28/2002
Title:	SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS

26

Patent #:	6467011	Issue Dt:	10/15/2002	Application #:	09859193	Filing Dt:	05/15/2001
Publication #:	US20020032823	Pub Dt:	03/14/2002
Title:	SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS

27

Patent #:	6424570	Issue Dt:	07/23/2002	Application #:	09892189	Filing Dt:	06/26/2001
Title:	MODULATED CHARGE PUMP WHICH USES AN ANALOG TO DIGITAL CONVERTER TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS

28

Patent #:	6535419	Issue Dt:	03/18/2003	Application #:	09905421	Filing Dt:	07/13/2001
Publication #:	US20010038553	Pub Dt:	11/08/2001
Title:	MIXED MODE MULTI LEVEL MODE INDICTOR

29

Patent #:	6803279	Issue Dt:	10/12/2004	Application #:	09966754	Filing Dt:	10/01/2001
Publication #:	US20020052081	Pub Dt:	05/02/2002
Title:	NROM FABRICATION METHOD

30

Patent #:	6917541	Issue Dt:	07/12/2005	Application #:	10060185	Filing Dt:	02/01/2002
Publication #:	US20030043623	Pub Dt:	03/06/2003
Title:	NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

31

Patent #:	6836432	Issue Dt:	12/28/2004	Application #:	10074495	Filing Dt:	02/11/2002
Title:	PARTIAL PAGE PROGRAMMING OF MULTI LEVEL FLASH

32

Patent #:	6937521	Issue Dt:	08/30/2005	Application #:	10155216	Filing Dt:	05/28/2002
Publication #:	US20030002345	Pub Dt:	01/02/2003
Title:	PROGRAMMING AND ERASING METHODS FOR A NON -VOLATILE MEMORY CELL

33

Patent #:	6829172	Issue Dt:	12/07/2004	Application #:	10155217	Filing Dt:	05/28/2002
Publication #:	US20030072192	Pub Dt:	04/17/2003
Title:	PROGRAMMING OF NONVOLATILE MEMORY CELLS

34

Patent #:	6700818	Issue Dt:	03/02/2004	Application #:	10211248	Filing Dt:	08/05/2002
Publication #:	US20030156456	Pub Dt:	08/21/2003
Title:	METHOD FOR OPERATING A MEMORY DEVICE

35

Patent #:	6768682	Issue Dt:	07/27/2004	Application #:	10259761	Filing Dt:	09/30/2002
Publication #:	US20030107919	Pub Dt:	06/12/2003
Title:	NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR CONTROLLING PROGRAMMING VOLTAGE OF NONVOLATILE SEMICONDUCTOR MEMORY

36

Patent #:	6788580	Issue Dt:	09/07/2004	Application #:	10454630	Filing Dt:	06/05/2003
Publication #:	US20030206435	Pub Dt:	11/06/2003
Title:	NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND DATA ERASING METHOD

37

Patent #:	7064983	Issue Dt:	06/20/2006	Application #:	10454820	Filing Dt:	06/05/2003
Publication #:	US20040081010	Pub Dt:	04/29/2004
Title:	METHOD FOR PROGRAMMING A REFERENCE CELL

38

Patent #:	6778437	Issue Dt:	08/17/2004	Application #:	10635974	Filing Dt:	08/07/2003
Title:	MEMORY CIRCUIT FOR PROVIDING WORD LINE REDUNDANCY IN A MEMORY SECTOR

39

Patent #:	7178004	Issue Dt:	02/13/2007	Application #:	10653388	Filing Dt:	09/03/2003
Publication #:	US20040153621	Pub Dt:	08/05/2004
Title:	MEMORY ARRAY PROGRAMMING CIRCUIT AND A METHOD FOR USING THE CIRCUIT

40

Patent #:	6963505	Issue Dt:	11/08/2005	Application #:	10695448	Filing Dt:	10/29/2003
Publication #:	US20040136220	Pub Dt:	07/15/2004
Title:	METHOD CIRCUIT AND SYSTEM FOR DETERMINING A REFERENCE VOLTAGE

41

Patent #:	6992932	Issue Dt:	01/31/2006	Application #:	10695457	Filing Dt:	10/29/2003
Publication #:	US20040136236	Pub Dt:	07/15/2004
Title:	METHOD CIRCUIT AND SYSTEM FOR READ ERROR DETECTION IN A NON-VOLATILE MEMORY ARRAY

42

Patent #:	7174435	Issue Dt:	02/06/2007	Application #:	10715366	Filing Dt:	11/19/2003
Publication #:	US20040139289	Pub Dt:	07/15/2004
Title:	MEMORY CONTROL CIRCUIT, MEMORY DEVICE, AND MICROCOMPUTER

43

Patent #:	6961267	Issue Dt:	11/01/2005	Application #:	10738301	Filing Dt:	12/16/2003
Title:	METHOD AND DEVICE FOR PROGRAMMING CELLS IN A MEMORY ARRAY IN A NARROW DISTRIBUTION

44

Patent #:	7079420	Issue Dt:	07/18/2006	Application #:	10747217	Filing Dt:	12/30/2003
Publication #:	US20050058005	Pub Dt:	03/17/2005
Title:	METHOD FOR OPERATING A MEMORY DEVICE

45

Patent #:	6987696	Issue Dt:	01/17/2006	Application #:	10885268	Filing Dt:	07/06/2004
Publication #:	US20060007752	Pub Dt:	01/12/2006
Title:	METHOD OF IMPROVING ERASE VOLTAGE DISTRIBUTION FOR A FLASH MEMORY ARRAY HAVING DUMMY WORDLINES

46

Patent #:	7095655	Issue Dt:	08/22/2006	Application #:	10916413	Filing Dt:	08/12/2004
Publication #:	US20060034122	Pub Dt:	02/16/2006
Title:	DYNAMIC MATCHING OF SIGNAL PATH AND REFERENCE PATH FOR SENSING

47

Patent #:	7943979	Issue Dt:	05/17/2011	Application #:	10961398	Filing Dt:	10/12/2004
Publication #:	US20080073702	Pub Dt:	03/27/2008
Title:	NROM FABRICATION METHOD

48

Patent #:	7190620	Issue Dt:	03/13/2007	Application #:	11029380	Filing Dt:	01/06/2005
Publication #:	US20050117395	Pub Dt:	06/02/2005
Title:	METHOD FOR OPERATING A MEMORY DEVICE

49

Patent #:	7206224	Issue Dt:	04/17/2007	Application #:	11037477	Filing Dt:	01/18/2005
Title:	METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES

50

Patent #:	8024495	Issue Dt:	09/20/2011	Application #:	11169747	Filing Dt:	06/30/2005
Publication #:	US20060215678	Pub Dt:	09/28/2006
Title:	COMMUNICATION DATA CONTROLLER

51

Patent #:	7352626	Issue Dt:	04/01/2008	Application #:	11212614	Filing Dt:	08/29/2005
Title:	VOLTAGE REGULATOR WITH LESS OVERSHOOT AND FASTER SETTLING TIME

52

Patent #:	7295475	Issue Dt:	11/13/2007	Application #:	11229664	Filing Dt:	09/20/2005
Publication #:	US20070064493	Pub Dt:	03/22/2007
Title:	FLASH MEMORY PROGRAMMING USING AN INDICATION BIT TO INTERPRET STATE

53

Patent #:	8443131	Issue Dt:	05/14/2013	Application #:	11259874	Filing Dt:	10/26/2005
Publication #:	US20060101301	Pub Dt:	05/11/2006
Title:	NON-VOLATILE MEMORY DEVICE

54

Patent #:	7251161	Issue Dt:	07/31/2007	Application #:	11290001	Filing Dt:	11/30/2005
Publication #:	US20060215477	Pub Dt:	09/28/2006
Title:	SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SAID SEMICONDUCTOR DEVICE

55

Patent #:	7352627	Issue Dt:	04/01/2008	Application #:	11324718	Filing Dt:	01/03/2006
Publication #:	US20070153575	Pub Dt:	07/05/2007
Title:	METHOD, SYSTEM, AND CIRCUIT FOR OPERATING A NON-VOLATILE MEMORY ARRAY

56

Patent #:	7420848	Issue Dt:	09/02/2008	Application #:	11328015	Filing Dt:	01/09/2006
Publication #:	US20060126396	Pub Dt:	06/15/2006
Title:	METHOD, SYSTEM, AND CIRCUIT FOR OPERATING A NON-VOLATILE MEMORY ARRAY

57

Patent #:	7404026	Issue Dt:	07/22/2008	Application #:	11400902	Filing Dt:	04/10/2006
Publication #:	US20070239918	Pub Dt:	10/11/2007
Title:	MULTI MEDIA CARD WITH HIGH STORAGE CAPACITY

58

Patent #:	7512009	Issue Dt:	03/31/2009	Application #:	11413962	Filing Dt:	04/27/2006
Publication #:	US20060268621	Pub Dt:	11/30/2006
Title:	METHOD FOR PROGRAMMING A REFERENCE CELL

59

Patent #:	8156272	Issue Dt:	04/10/2012	Application #:	11469755	Filing Dt:	09/01/2006
Publication #:	US20080059668	Pub Dt:	03/06/2008
Title:	MULTIPLE COMMUNICATION CHANNELS ON MMC OR SD CMD LINE

60

Patent #:	7466594	Issue Dt:	12/16/2008	Application #:	11490539	Filing Dt:	07/19/2006
Publication #:	US20070171717	Pub Dt:	07/26/2007
Title:	DYNAMIC MATCHING OF SIGNAL PATH AND REFERENCE PATH FOR SENSING

61

Patent #:	7319615	Issue Dt:	01/15/2008	Application #:	11497597	Filing Dt:	08/02/2006
Publication #:	US20080037330	Pub Dt:	02/14/2008
Title:	RAMP GATE ERASE FOR DUAL BIT FLASH MEMORY

62

Patent #:	7750741	Issue Dt:	07/06/2010	Application #:	11505446	Filing Dt:	08/17/2006
Publication #:	US20070200637	Pub Dt:	08/30/2007
Title:	PLL CIRCUIT AND SEMICONDUCTOR DEVICE

63

Patent #:	7701779	Issue Dt:	04/20/2010	Application #:	11518192	Filing Dt:	09/11/2006
Publication #:	US20070253248	Pub Dt:	11/01/2007
Title:	METHOD FOR PROGRAMMING A REFERENCE CELL

64

Patent #:	7512743	Issue Dt:	03/31/2009	Application #:	11557439	Filing Dt:	11/07/2006
Publication #:	US20080126749	Pub Dt:	05/29/2008
Title:	USING SHARED MEMORY WITH AN EXECUTE-IN-PLACE PROCESSOR AND A CO-PROCESSOR

65

Patent #:	7586371	Issue Dt:	09/08/2009	Application #:	11589140	Filing Dt:	10/30/2006
Publication #:	US20080001661	Pub Dt:	01/03/2008
Title:	REGULATOR CIRCUIT

66

Patent #:	7586788	Issue Dt:	09/08/2009	Application #:	11607090	Filing Dt:	12/01/2006
Publication #:	US20070133303	Pub Dt:	06/14/2007
Title:	NONVOLATILE SEMICONDUCTOR MEMORY HAVING VOLTAGE ADJUSTING CIRCUIT

67

Patent #:	8117445	Issue Dt:	02/14/2012	Application #:	11613620	Filing Dt:	12/20/2006
Publication #:	US20080155257	Pub Dt:	06/26/2008
Title:	NEAR FIELD COMMUNICATION, SECURITY AND NON-VOLATILE MEMORY INTEGRATED SUB-SYSTEM FOR EMBEDDED PORTABLE APPLICATIONS

68

Patent #:	8190908	Issue Dt:	05/29/2012	Application #:	11613627	Filing Dt:	12/20/2006
Publication #:	US20080155268	Pub Dt:	06/26/2008
Title:	SECURE DATA VERIFICATION VIA BIOMETRIC INPUT

69

Patent #:	8190919	Issue Dt:	05/29/2012	Application #:	11613691	Filing Dt:	12/20/2006
Publication #:	US20080109662	Pub Dt:	05/08/2008
Title:	MULTIPLE STAKEHOLDER SECURE MEMORY PARTITIONING AND ACCESS CONTROL

70

Patent #:	8190885	Issue Dt:	05/29/2012	Application #:	11614257	Filing Dt:	12/21/2006
Publication #:	US20080155258	Pub Dt:	06/26/2008
Title:	NON-VOLATILE MEMORY SUB-SYSTEM INTEGRATED WITH SECURITY FOR STORING NEAR FIELD TRANSACTIONS

71

Patent #:	8356361	Issue Dt:	01/15/2013	Application #:	11614309	Filing Dt:	12/21/2006
Publication #:	US20080109903	Pub Dt:	05/08/2008
Title:	SECURE CO-PROCESSING MEMORY CONTROLLER INTEGRATED INTO AN EMBEDDED MEMORY SUBSYSTEM

72

Patent #:	7882365	Issue Dt:	02/01/2011	Application #:	11615492	Filing Dt:	12/22/2006
Publication #:	US20080155275	Pub Dt:	06/26/2008
Title:	SYSTEMS AND METHODS FOR DISTINGUISHING BETWEEN ACTUAL DATA AND ERASED/BLANK MEMORY WITH REGARD TO ENCRYPTED DATA

73

Patent #:	7836269	Issue Dt:	11/16/2010	Application #:	11618075	Filing Dt:	12/29/2006
Publication #:	US20080162784	Pub Dt:	07/03/2008
Title:	SYSTEMS AND METHODS FOR ACCESS VIOLATION MANAGEMENT OF SECURED MEMORY

74

Patent #:	8239637	Issue Dt:	08/07/2012	Application #:	11625158	Filing Dt:	01/19/2007
Publication #:	US20080177931	Pub Dt:	07/24/2008
Title:	BYTE MASK COMMAND FOR MEMORIES

75

Patent #:	7605457	Issue Dt:	10/20/2009	Application #:	11636155	Filing Dt:	12/07/2006
Publication #:	US20070145579	Pub Dt:	06/28/2007
Title:	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

76

Patent #:	7644226	Issue Dt:	01/05/2010	Application #:	11642412	Filing Dt:	12/19/2006
Title:	SYSTEM AND METHOD FOR MAINTAINING RAM COMMAND TIMING ACROSS PHASE-SHIFTED TIME DOMAINS

77

Patent #:	7565477	Issue Dt:	07/21/2009	Application #:	11644031	Filing Dt:	12/22/2006
Publication #:	US20080155180	Pub Dt:	06/26/2008
Title:	SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME

78

Patent #:	7574576	Issue Dt:	08/11/2009	Application #:	11644161	Filing Dt:	12/22/2006
Publication #:	US20080155217	Pub Dt:	06/26/2008
Title:	SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME

79

Patent #:	7283402	Issue Dt:	10/16/2007	Application #:	11653655	Filing Dt:	01/16/2007
Publication #:	US20070115730	Pub Dt:	05/24/2007
Title:	METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES

80

Patent #:	7802114	Issue Dt:	09/21/2010	Application #:	11687487	Filing Dt:	03/16/2007
Publication #:	US20080229122	Pub Dt:	09/18/2008
Title:	STATE CHANGE SENSING

81

Patent #:	7743230	Issue Dt:	06/22/2010	Application #:	11704908	Filing Dt:	02/12/2007
Publication #:	US20070168637	Pub Dt:	07/19/2007
Title:	MEMORY ARRAY PROGRAMMING CIRCUIT AND A METHOD FOR USING THE CIRCUIT

82

Patent #:	7532518	Issue Dt:	05/12/2009	Application #:	11767622	Filing Dt:	06/25/2007
Publication #:	US20080316830	Pub Dt:	12/25/2008
Title:	COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES

83

Patent #:	7535767	Issue Dt:	05/19/2009	Application #:	11834420	Filing Dt:	08/06/2007
Publication #:	US20090040839	Pub Dt:	02/12/2009
Title:	READING MULTI-CELL MEMORY DEVICES UTILIZING COMPLEMENTARY BIT INFORMATION

84

Patent #:	7515478	Issue Dt:	04/07/2009	Application #:	11841468	Filing Dt:	08/20/2007
Publication #:	US20090052245	Pub Dt:	02/26/2009
Title:	CMOS LOGIC COMPATIBLE NON-VOLATILE MEMORY CELL STRUCTURE, OPERATION, AND ARRAY CONFIGURATION

85

Patent #:	8139763	Issue Dt:	03/20/2012	Application #:	11870102	Filing Dt:	10/10/2007
Publication #:	US20090097637	Pub Dt:	04/16/2009
Title:	RANDOMIZED RSA-BASED CRYPTOGRAPHIC EXPONENTIATION RESISTANT TO SIDE CHANNEL AND FAULT ATTACKS

86

Patent #:	7921322	Issue Dt:	04/05/2011	Application #:	11874001	Filing Dt:	10/17/2007
Publication #:	US20090106577	Pub Dt:	04/23/2009
Title:	OPTIMIZE PERSONALIZATION CONDITIONS FOR ELECTRONIC DEVICE TRANSMISSION RATES WITH INCREASED TRANSMITTING FREQUENCY

87

Patent #:	8301963	Issue Dt:	10/30/2012	Application #:	11877497	Filing Dt:	10/23/2007
Publication #:	US20090106626	Pub Dt:	04/23/2009
Title:	LOW-DENSITY PARITY-CHECK CODE BASED ERROR CORRECTION FOR MEMORY DEVICE

88

Patent #:	8239732	Issue Dt:	08/07/2012	Application #:	11928434	Filing Dt:	10/30/2007
Publication #:	US20090113272	Pub Dt:	04/30/2009
Title:	ERROR CORRECTION CODING IN FLASH MEMORY DEVICES

89

Patent #:	8219738	Issue Dt:	07/10/2012	Application #:	11949521	Filing Dt:	12/03/2007
Publication #:	US20090144486	Pub Dt:	06/04/2009
Title:	DIRECT INTERCONNECTION BETWEEN PROCESSOR AND MEMORY COMPONENT

90

Patent #:	7746705	Issue Dt:	06/29/2010	Application #:	11953689	Filing Dt:	12/10/2007
Publication #:	US20090147589	Pub Dt:	06/11/2009
Title:	SELECTIVE APPLICATION OF WORD LINE BIAS TO MINIMIZE FRINGE EFFECTS IN ELECTROMAGNETIC FIELDS DURING ERASE OF NONVOLATILE MEMORY

91

Patent #:	8140746	Issue Dt:	03/20/2012	Application #:	11957226	Filing Dt:	12/14/2007
Publication #:	US20090157948	Pub Dt:	06/18/2009
Title:	INTELLIGENT MEMORY DATA MANAGEMENT

92

Patent #:	8261006	Issue Dt:	09/04/2012	Application #:	11960601	Filing Dt:	12/19/2007
Publication #:	US20090164700	Pub Dt:	06/25/2009
Title:	EFFICIENT MEMORY HIERARCHY IN SOLID STATE DRIVE DESIGN

93

Patent #:	8261124	Issue Dt:	09/04/2012	Application #:	11963078	Filing Dt:	12/21/2007
Publication #:	US20090164836	Pub Dt:	06/25/2009
Title:	SYSTEM AND METHOD FOR OPTIMIZED ERROR CORRECTION IN FLASH MEMORY ARRAYS

94

Patent #:	8106442	Issue Dt:	01/31/2012	Application #:	11979183	Filing Dt:	10/31/2007
Publication #:	US20080099832	Pub Dt:	05/01/2008
Title:	NROM FRABRICATION METHOD

95

Patent #:	7932131	Issue Dt:	04/26/2011	Application #:	11983041	Filing Dt:	11/05/2007
Publication #:	US20090115033	Pub Dt:	05/07/2009
Title:	REDUCTION OF PACKAGE HEIGHT IN A STACKED DIE CONFIGURATION

96

Patent #:	7904674	Issue Dt:	03/08/2011	Application #:	11984152	Filing Dt:	11/14/2007
Publication #:	US20080114949	Pub Dt:	05/15/2008
Title:	METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY DEVICE

97

Patent #:	7847607	Issue Dt:	12/07/2010	Application #:	11987003	Filing Dt:	11/26/2007
Publication #:	US20080136474	Pub Dt:	06/12/2008
Title:	PLL CIRCUIT

98

Patent #:	8008709	Issue Dt:	08/30/2011	Application #:	12005323	Filing Dt:	12/27/2007
Publication #:	US20080135911	Pub Dt:	06/12/2008
Title:	NROM FABRICATION METHOD

99

Patent #:	8332572	Issue Dt:	12/11/2012	Application #:	12026299	Filing Dt:	02/05/2008
Publication #:	US20090198872	Pub Dt:	08/06/2009
Title:	WEAR LEVELING MECHANISM USING A DRAM BUFFER

100

Patent #:	8352671	Issue Dt:	01/08/2013	Application #:	12026302	Filing Dt:	02/05/2008
Publication #:	US20090198873	Pub Dt:	08/06/2009
Title:	PARTIAL ALLOCATE PAGING MECHANISM USING A CONTROLLER AND A BUFFER

Assignor

1

BARCLAYS BANK PLC

Exec Dt:

12/27/2014

Assignees

1

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

2

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

3

SPANSION TECHNOLOGY INC.

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

4

SPANSION TECHNOLOGY LLC

915 DEGUIGNE DRIVE

SUNNYVALE, CALIFORNIA 94088

Correspondence name and address
	DWAYNE C. HOUSTON
	1025 VERMONT AVENUE NW, SUITE 1130
	NATIONAL CORPORATE RESEARCH, LTD.
	WASHINGTON, DC 20005

Search Results as of: 05/01/2024 03:31 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6

| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT