skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036036/0738   Pages: 153
Recorded: 06/30/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 50
1
Patent #:
Issue Dt:
10/30/2007
Application #:
10738322
Filing Dt:
12/16/2003
Title:
FLASH MEMORY WITH BURIED BIT LINES
2
Patent #:
Issue Dt:
11/27/2007
Application #:
10762445
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
07/28/2005
Title:
STRUCTURE AND METHOD FOR LOW VSS RESISTANCE AND REDUCED DIBL IN A FLOATING GATE MEMORY CELL
3
Patent #:
Issue Dt:
08/07/2007
Application #:
10776870
Filing Dt:
02/11/2004
Publication #:
Pub Dt:
08/19/2004
Title:
ACTIVE PROGRAMMING AND OPERATION OF A MEMORY DEVICE
4
Patent #:
Issue Dt:
08/07/2007
Application #:
10791417
Filing Dt:
03/02/2004
Title:
TESTING FOR OPERATING LIFE OF A MEMORY DEVICE WITH ADDRESS CYCLING USING A GRAY CODE SEQUENCE
5
Patent #:
Issue Dt:
09/04/2007
Application #:
10799413
Filing Dt:
03/12/2004
Title:
AVOIDING FIELD OXIDE GOUGING IN SHALLOW TRENCH ISOLATION (STI) REGIONS
6
Patent #:
Issue Dt:
08/21/2007
Application #:
10818261
Filing Dt:
04/02/2004
Publication #:
Pub Dt:
01/13/2005
Title:
MEMORY DEVICE AND METHODS OF USING AND MAKING THE DEVICE
7
Patent #:
Issue Dt:
10/09/2007
Application #:
10838215
Filing Dt:
05/05/2004
Title:
FLASH MEMORY DEVICE
8
Patent #:
Issue Dt:
10/16/2007
Application #:
10838962
Filing Dt:
05/04/2004
Title:
METHOD FOR MINIMIZING FALSE DETECTION OF STATES IN FLASH MEMORY DEVICES
9
Patent #:
Issue Dt:
10/30/2007
Application #:
10919846
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
SYSTEMS AND METHODS FOR ADJUSTING PROGRAMMING THRESHOLDS OF POLYMER MEMORY CELLS
10
Patent #:
Issue Dt:
11/27/2007
Application #:
10939513
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
10/13/2005
Title:
VOLTAGE CONTROLLED OSCILLATOR AND PLL CIRCUIT
11
Patent #:
Issue Dt:
08/28/2007
Application #:
10981792
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
12/15/2005
Title:
CIRCUIT AND METHOD FOR CONTROLLING DC-DC CONVERTER
12
Patent #:
Issue Dt:
09/18/2007
Application #:
11001940
Filing Dt:
12/01/2004
Title:
METHOD, SYSTEM, AND CIRCUIT FOR PERFORMING A MEMORY RELATED OPERATION
13
Patent #:
Issue Dt:
09/25/2007
Application #:
11034071
Filing Dt:
01/12/2005
Title:
VARIABLE DENSITY AND VARIABLE PERSISTENT ORGANIC MEMORY DEVICES, METHODS, AND FABRICATION
14
Patent #:
Issue Dt:
11/13/2007
Application #:
11035188
Filing Dt:
01/13/2005
Title:
METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
15
Patent #:
Issue Dt:
10/16/2007
Application #:
11041608
Filing Dt:
01/24/2005
Publication #:
Pub Dt:
07/27/2006
Title:
AUTOMATED TESTS FOR BUILT-IN SELF TEST
16
Patent #:
Issue Dt:
10/09/2007
Application #:
11087735
Filing Dt:
03/24/2005
Publication #:
Pub Dt:
02/09/2006
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT ERASES STORED DATA AFTER A PREDETERMINED TIME PERIOD WITHOUT THE USE OF A TIMER CIRCUIT
17
Patent #:
Issue Dt:
12/11/2007
Application #:
11089707
Filing Dt:
03/25/2005
Title:
MEMORY DEVICE WITH IMPROVED DATA RETENTION
18
Patent #:
Issue Dt:
12/11/2007
Application #:
11099339
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
NON-CRITICAL COMPLEMENTARY MASKING METHOD FOR POLY-1 DEFINITION IN FLASH MEMORY DEVICE FABRICATION
19
Patent #:
Issue Dt:
12/04/2007
Application #:
11113509
Filing Dt:
04/25/2005
Publication #:
Pub Dt:
10/26/2006
Title:
SELF-ALIGNED STI SONOS
20
Patent #:
Issue Dt:
10/23/2007
Application #:
11126739
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
12/08/2005
Title:
CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
21
Patent #:
Issue Dt:
08/21/2007
Application #:
11139227
Filing Dt:
05/27/2005
Publication #:
Pub Dt:
11/30/2006
Title:
PAGE BUFFER ARCHITECTURE FOR PROGRAMMING, ERASING AND READING NANOSCALE RESISTIVE MEMORY DEVICES
22
Patent #:
Issue Dt:
08/28/2007
Application #:
11146126
Filing Dt:
06/07/2005
Title:
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
23
Patent #:
Issue Dt:
09/11/2007
Application #:
11146690
Filing Dt:
06/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
METHOD OF PROGRAMMING A MEMORY DEVICE
24
Patent #:
Issue Dt:
10/23/2007
Application #:
11165005
Filing Dt:
06/23/2005
Title:
RESISTIVE MEMORY DEVICE WITH IMPROVED DATA RETENTION
25
Patent #:
Issue Dt:
10/30/2007
Application #:
11166572
Filing Dt:
06/24/2005
Title:
METHOD OF PROGRAMMING A RESISTIVE MEMORY DEVICE
26
Patent #:
Issue Dt:
10/09/2007
Application #:
11173735
Filing Dt:
07/01/2005
Publication #:
Pub Dt:
01/05/2006
Title:
MEMORY SYSTEM AND TEST METHOD THEREFOR
27
Patent #:
Issue Dt:
09/11/2007
Application #:
11174560
Filing Dt:
07/06/2005
Publication #:
Pub Dt:
01/11/2007
Title:
PROGRAMMING A MEMORY DEVICE
28
Patent #:
Issue Dt:
10/23/2007
Application #:
11194449
Filing Dt:
08/02/2005
Title:
BACK-TO-BACK NPN/PNP PROTECTION DIODES
29
Patent #:
Issue Dt:
11/20/2007
Application #:
11195201
Filing Dt:
08/01/2005
Title:
SEMICONDUCTOR MEMORY WITH DATA RETENTION LINER
30
Patent #:
Issue Dt:
12/11/2007
Application #:
11212850
Filing Dt:
08/29/2005
Title:
FLASH MEMORY DEVICE HAVING IMPROVED PROGRAM RATE
31
Patent #:
Issue Dt:
10/23/2007
Application #:
11215246
Filing Dt:
08/30/2005
Publication #:
Pub Dt:
03/02/2006
Title:
EXPOSURE SYSTEM, SEMICONDUCTOR DEVICE, AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE
32
Patent #:
Issue Dt:
10/09/2007
Application #:
11215850
Filing Dt:
08/30/2005
Publication #:
Pub Dt:
03/02/2006
Title:
NON-VOLATILE MEMORY DEVICE, AND CONTROL METHOD THEREFOR
33
Patent #:
Issue Dt:
09/04/2007
Application #:
11215889
Filing Dt:
08/30/2005
Publication #:
Pub Dt:
03/02/2006
Title:
NON-VOLATILE MEMORY DEVICE AND ERASING METHOD THEREFOR
34
Patent #:
Issue Dt:
11/27/2007
Application #:
11216000
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
10/05/2006
Title:
VARIABLE CAPACITY CIRCUIT AND CONTROL METHOD OF VARIABLE CAPACITY CIRCUIT
35
Patent #:
Issue Dt:
08/28/2007
Application #:
11228777
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
03/30/2006
Title:
SEMICONDUCTOR MEMORY DEVICE USING READ DATA BUS FOR WRITING DATA DURING HIGH-SPEED WRITING
36
Patent #:
Issue Dt:
12/11/2007
Application #:
11228842
Filing Dt:
09/16/2005
Title:
MEMORY DEVICES WITH ACTIVE AND PASSIVE DOPED SOL-GEL LAYERS
37
Patent #:
Issue Dt:
11/13/2007
Application #:
11229664
Filing Dt:
09/20/2005
Publication #:
Pub Dt:
03/22/2007
Title:
FLASH MEMORY PROGRAMMING USING AN INDICATION BIT TO INTERPRET STATE
38
Patent #:
Issue Dt:
09/25/2007
Application #:
11242773
Filing Dt:
10/04/2005
Title:
RELIABLE AND SCALABLE VIRTUAL GROUND MEMORY ARRAY FORMED WITH REDUCED THERMAL CYCLE
39
Patent #:
Issue Dt:
08/21/2007
Application #:
11250913
Filing Dt:
10/14/2005
Title:
VOLTAGE SUPPLY CIRCUIT FOR MEMORY ARRAY PROGRAMMING
40
Patent #:
Issue Dt:
10/23/2007
Application #:
11261743
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/04/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME
41
Patent #:
Issue Dt:
08/21/2007
Application #:
11262651
Filing Dt:
10/31/2005
Title:
MEMORY ARRAY
42
Patent #:
Issue Dt:
09/04/2007
Application #:
11311485
Filing Dt:
12/20/2005
Publication #:
Pub Dt:
03/08/2007
Title:
REDUNDANCY SUBSTITUTION METHOD, SEMICONDUCTOR MEMORY DEVICE AND INFORMATION PROCESSING APPARATUS
43
Patent #:
Issue Dt:
10/02/2007
Application #:
11312392
Filing Dt:
12/21/2005
Publication #:
Pub Dt:
03/15/2007
Title:
CLOCK GENERATION CIRCUIT AND CLOCK GENERATION METHOD
44
Patent #:
Issue Dt:
10/09/2007
Application #:
11342553
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
04/26/2007
Title:
DC-DC CONVERTER AND METHOD FOR CONTROLLING DC-DC CONVERTER
45
Patent #:
Issue Dt:
09/25/2007
Application #:
11342947
Filing Dt:
01/30/2006
Publication #:
Pub Dt:
11/30/2006
Title:
NON-VOLATILE MEMORY AND METHOD OF CONTROLLING THE SAME
46
Patent #:
Issue Dt:
11/20/2007
Application #:
11362513
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
06/14/2007
Title:
STEP-UP (BOOST) DC REGULATOR WITH TWO-LEVEL BACK-BIAS SWITCH GATE VOLTAGE
47
Patent #:
Issue Dt:
10/09/2007
Application #:
11363049
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
06/29/2006
Title:
SIGMA-DELTA MODULATOR FOR PLL CIRCUITS
48
Patent #:
Issue Dt:
09/11/2007
Application #:
11369003
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
06/21/2007
Title:
CONTROL CIRCUIT AND CONTROL METHOD FOR DC-DC CONVERTER
49
Patent #:
Issue Dt:
09/25/2007
Application #:
11443770
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
12/14/2006
Title:
STORAGE DEVICE AND CONTROL METHOD THEREFOR
50
Patent #:
Issue Dt:
10/16/2007
Application #:
11653655
Filing Dt:
01/16/2007
Publication #:
Pub Dt:
05/24/2007
Title:
METHODS AND SYSTEMS FOR HIGH WRITE PERFORMANCE IN MULTI-BIT FLASH MEMORY DEVICES
Assignor
1
Exec Dt:
06/01/2015
Assignee
1
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

Search Results as of: 05/15/2024 05:15 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT