Total properties:
45
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
09548213
|
Filing Dt:
|
04/12/2000
|
Title:
|
CONTROL SYSTEM FOR CHARGING BATTERIES AND ELECTRONIC APPARATUS USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
10383068
|
Filing Dt:
|
03/07/2003
|
Title:
|
CONTROL SYSTEM FOR CHARGING BATTERIES AND ELECTRONIC APPARATUS USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
10609159
|
Filing Dt:
|
06/27/2003
|
Title:
|
APPARATUS AND METHOD FOR A METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SOURCE SIDE PUNCH-THROUGH PROTECTION IMPLANT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
10854781
|
Filing Dt:
|
05/27/2004
|
Title:
|
CHARGE/DISCHARGE CONTROL CIRCUIT AND SECONDARY BATTERY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
11350072
|
Filing Dt:
|
02/09/2006
|
Publication #:
|
|
Pub Dt:
|
04/12/2007
| | | | |
Title:
|
Extended language specification assigning method, program developing method and computer-readable storage medium
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
11520778
|
Filing Dt:
|
09/14/2006
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
IMAGE PROCESSING APPARATUS AND METHOD FOR IMAGE RESIZING MATCHING DATA SUPPLY SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
11550406
|
Filing Dt:
|
10/17/2006
|
Publication #:
|
|
Pub Dt:
|
04/26/2007
| | | | |
Title:
|
BURIED WORD LINE MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
11702845
|
Filing Dt:
|
02/05/2007
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
Title:
|
DUAL STORAGE NODE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
11873810
|
Filing Dt:
|
10/17/2007
|
Publication #:
|
|
Pub Dt:
|
04/23/2009
| | | | |
Title:
|
HYBRID FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
11928372
|
Filing Dt:
|
10/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
SIGNAL DESCRAMBLING DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12004960
|
Filing Dt:
|
12/20/2007
|
Publication #:
|
|
Pub Dt:
|
09/04/2008
| | | | |
Title:
|
HEAT DISSIPATION METHODS AND STRUCTURES FOR SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
12059795
|
Filing Dt:
|
03/31/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
MEMORY RESOURCE MANAGEMENT FOR A FLASH AWARE KERNEL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
12068122
|
Filing Dt:
|
02/01/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
SIMULATOR ENGINE DEVELOPMENT SYSTEM AND SIMULATOR ENGINE DEVELOPMENT METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
12111122
|
Filing Dt:
|
04/28/2008
|
Publication #:
|
|
Pub Dt:
|
10/29/2009
| | | | |
Title:
|
METHODS FOR FABRICATING MEMORY CELLS HAVING FIN STRUCTURES WITH SMOOTH SIDEWALLS AND ROUNDED TOP CORNERS AND EDGES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
12284002
|
Filing Dt:
|
09/17/2008
|
Publication #:
|
|
Pub Dt:
|
03/18/2010
| | | | |
Title:
|
ELECTRICALLY PROGRAMMABLE AND ERASABLE MEMORY DEVICE AND METHOD OF FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
12410152
|
Filing Dt:
|
03/24/2009
|
Publication #:
|
|
Pub Dt:
|
09/10/2009
| | | | |
Title:
|
SIGNAL RECEIVER APPARATUS AND WAVEFORM SHAPING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
12548751
|
Filing Dt:
|
08/27/2009
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
SOFTWARE OPTIMIZATION DEVICE AND SOFTWARE OPTIMIZATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
12697879
|
Filing Dt:
|
02/01/2010
|
Publication #:
|
|
Pub Dt:
|
08/05/2010
| | | | |
Title:
|
CHARGING CIRCUIT, CHARGING APPARATUS, ELECTRONIC EQUIPMENT AND CHARGING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
12699635
|
Filing Dt:
|
02/03/2010
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
SELF-ALIGNED SI RICH NITRIDE CHARGE TRAP LAYER ISOLATION FOR CHARGE TRAP FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
12721667
|
Filing Dt:
|
03/11/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
EXECUTION HISTORY TRACING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12815126
|
Filing Dt:
|
06/14/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
DC/DC CONVERTER HAVING A DELAY GENERATOR CIRCUIT POSITIONED BETWEEN A COMPARATOR AND A PULSE GENERATOR AND A DC/DC CONVERTER CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
12818866
|
Filing Dt:
|
06/18/2010
|
Publication #:
|
|
Pub Dt:
|
10/14/2010
| | | | |
Title:
|
METHOD AND STRUCTURE OF MINIMIZING MOLD BLEEDING ON A SUBSTRATE SURFACE OF A SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12900370
|
Filing Dt:
|
10/07/2010
|
Publication #:
|
|
Pub Dt:
|
02/03/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12974754
|
Filing Dt:
|
12/21/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
13020692
|
Filing Dt:
|
02/03/2011
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
SEMICONDUCTOR MANUFACTURING APPARATUS AND CONTROL SYSTEM AND CONTROL METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13022410
|
Filing Dt:
|
02/07/2011
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
SEMICONDUCTOR MEMORY INCLUDING PROGRAM CIRCUIT OF NONVOLATILE MEMORY CELLS AND SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13070186
|
Filing Dt:
|
03/23/2011
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
Title:
|
DATA WRITING METHOD AND SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13074836
|
Filing Dt:
|
03/29/2011
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
Title:
|
JUNCTION LEAKAGE SUPPRESSION IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13098378
|
Filing Dt:
|
04/29/2011
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR TEMPERATURE COMPENSATION FOR PROGRAMMING AND ERASE DISTRIBUTIONS IN A FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13102158
|
Filing Dt:
|
05/06/2011
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
MICROCOMPUTER OUTPUTTING FAILURE DETECTION RESULT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13154616
|
Filing Dt:
|
06/07/2011
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
DETERMINING A LOGIC STATE BASED ON CURRENTS RECEIVED BY A SENSE AMPLIFER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13158054
|
Filing Dt:
|
06/10/2011
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
Title:
|
OSCILLATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13162520
|
Filing Dt:
|
06/16/2011
|
Publication #:
|
|
Pub Dt:
|
12/20/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR STAGGERED START-UP OF A PREDEFINED, RANDOM, OR DYNAMIC NUMBER OF FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13206380
|
Filing Dt:
|
08/09/2011
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13216142
|
Filing Dt:
|
08/23/2011
|
Publication #:
|
|
Pub Dt:
|
03/14/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13218154
|
Filing Dt:
|
08/25/2011
|
Publication #:
|
|
Pub Dt:
|
05/31/2012
| | | | |
Title:
|
LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13249069
|
Filing Dt:
|
09/29/2011
|
Publication #:
|
|
Pub Dt:
|
04/04/2013
| | | | |
Title:
|
APPARATUS AND METHOD FOR SMART VCC TRIP POINT DESIGN FOR TESTABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13294098
|
Filing Dt:
|
11/10/2011
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
METHOD AND DEVICE EMPLOYING POLYSILICON SCALING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13305684
|
Filing Dt:
|
11/28/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
ELECTRONIC DEVICE, CONTROL CIRCUIT, AND METHOD FOR CONTROLLING LIGHT EMITTING ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13316522
|
Filing Dt:
|
12/11/2011
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
REFERENCE VOLTAGE CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13326012
|
Filing Dt:
|
12/14/2011
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING LOWER LEAKAGE CURRENT BETWEEN SEMICONDUCTOR SUBSTRATE AND BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13569442
|
Filing Dt:
|
08/08/2012
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
Title:
|
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13600527
|
Filing Dt:
|
08/31/2012
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
HIGH READ SPEED MEMORY WITH GATE ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13613448
|
Filing Dt:
|
09/13/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
RADIATION DETECTING DEVICE AND METHOD OF OPERATING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13964958
|
Filing Dt:
|
08/12/2013
|
Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
APPARATUS AND METHOD FOR A METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SOURCE SIDE PUNCH-THROUGH PROTECTION IMPLANT
|
|